Debug SoC Design Engineer

Apple Inc

Quick summary

Work type: On-site
Location: Sunnyvale, CA
Salary: $126,800–$220,900 / yr
Posted: 52 days ago
Nearby: 99+ roles within 25 mi

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $189k

This role $174k

$115k most similar roles pay here $233k

This role pays less than 63% of similar roles. Most pay $161,350–$216,250 — the shaded band above. At the midpoint, this role pays about $174k versus about $189k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1723 open roles on FindRole.

Listed pay typically runs $162,500–$272,100 across 1398 roles with salary data.

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At a glance

TL;DR · Debug SoC Design Engineer

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As a Debug SoC Design Engineer at this innovative tech company, you will join a small, dynamic team focused on developing high-performance, low-power wireless System-on-Chip (SoC) products. Your primary responsibility will be owning the RTL design and micro-architecture development of the debug and trace hub, ensuring it meets stringent power, performance, and area goals. You will collaborate closely with SoC architects and IP developers to define essential debug features and guide validation engineers in their use for diagnosing issues. Key technologies include Verilog, AXI/AHB bus fabric, CoreSight debugging techniques, and industry-standard EDA tools. This role demands expertise in digital design, SoC architecture, and low-power design methodologies, making it a critical position in the development of cutting-edge products that will delight millions of customers worldwide.

Skills

Verilog CoreSight AXI AHB UPF RTL EDA tools HDL ASIC design flow micro-architecture specifications performance/power correlation debug features test bench development simulation/emulation functional verification

What you'll do

Own the RTL design for debug and trace hub, ensuring it meets power, performance, area goals.
Develop micro-architecture specifications in collaboration with silicon and software experts.
Support verification teams by developing test benches and simulations for functional verification.
Assist performance/power teams in diagnosing bottlenecks or overconsumption issues.
Aid validation engineers in using debug features to diagnose SoC-level issues.

What we're looking for

Bachelor's degree in a relevant field required
Proficiency in digital design, SoC architecture, and HDL languages like Verilog
Experience with microprocessor debug techniques such as CoreSight
Familiarity with AXI/AHB bus fabric and processor subsystems
Understanding of UPF and low-power design implementation techniques

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