CPU Server FV/CLP/STA Engineer
Qualcomm
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How this pay compares to similar roles
This role pays more than 65% of similar roles. Most pay $148,731–$214,000 — the blue band above. At the midpoint, this role pays about $185k versus about $181k for comparable roles.
Based on 240 similar postings.
Employer
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has 575 open roles on FindRole.
Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.
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At a glance
The CPU Server Floorplan and Integration Engineer joins the CPU Engineering team to develop high performance, energy efficient server solutions for data center applications. This role involves collaborating with microarchitecture, RTL design, and physical design teams to design, floorplan, and integrate CPU designs while meeting aggressive power, area, and performance goals. Key responsibilities include performing CPU physical design tasks such as floorplanning, Bump/RDL planning, IP integration, power/ground generation, and pin assignment. The engineer will manage chip-level place and route, oversee area optimizations, and develop workflows for chip integration and analysis. Required skills include proficiency in synthesis, place and route, signoff timing/power analysis, and extraction. The role requires expertise in static timing analysis, electromigration, IR drop flows, and low power high-performance design methodologies for large processor and SoC designs.
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