This role pays less than
72%
of similar roles. Most pay
$177,087–$250,000
— the shaded band above.
At the midpoint, this role pays about
$181k
versus about
$214k
for comparable roles.
Based on 240 similar postings.
Employer
About Amd
AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors
Amd currently has
512 open roles
on FindRole.
Listed pay typically runs
$166,400–$249,600
across 512 roles with salary data.
As a CPU RTL Power, Clocking, Reset Design Engineer on the Core Complex Cache Hierarchy team, you will serve as a Chip Pervasive Logic expert. You will own the power management, clocking, and reset microarchitecture and RTL for core complexes that connect execution cores with L2 caches and coherency fabrics. Your daily responsibilities include collaborating with architecture, physical design, verification, and test teams to design, document, and implement high-performance Power, Clocking, Reset, and Control Fabric RTL optimized for timing and manufacturability. You will solve complex architectural interactions across global IP and SoC teams while mentoring other engineers. The role requires expertise in Verilog HDL, scripting, and digital RTL design to address challenges in clock-domain crossing, voltage-domain management, and system management within the context of high-performance processor architecture and complex integrated circuit development.
Design, document, and implement high-performance Power, Clocking, Reset, and Control Fabric RTL.
Optimize designs for timing, testability, manufacturability, and physical implementation.
Resolve complex architectural interactions across global IP and SoC teams to ensure successful product execution.
Improve CPU performance, power, and area through design simplification and technical innovation.
Solve complex design and tool challenges using innovative approaches and communicate solutions to management.
Guide, mentor, and develop engineers across the organization.
What we're looking for
Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or Computer Science.
Experience in RTL design and microarchitecture development for processors or complex IPs.
Expertise in power management, clocking, and reset microarchitecture and RTL.
Strong background in Digital RTL Design, Verilog HDL, and scripting (preferred).
Track record of delivering high-performance CPU product architecture including clocks, power management, reset, and voltage-domain management (preferred).
Experience with system management, voltage management, and clock control architecture, implementation, and tapeout closure (preferred).
Experience with SoC development and collaboration across multidisciplinary engineering teams (preferred).
Ability to guide, mentor, and develop engineers across the organization.