CPU Microarchitect/RTL Engineer, Execution, Load/Store

Apple Inc

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Work type
On-site
Location
Beaverton, OR
Posted
40 days ago
Freshness
Confirmed live today
Nearby
99+ roles within 25 mi

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Similar $220k
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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3497 open roles on FindRole.

Listed pay typically runs $174,149–$277,600 across 2702 roles with salary data.

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TL;DR · CPU Microarchitect/RTL Engineer, Execution, Load/Store

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The CPU Microarchitect/RTL Engineer - Execution, Load/Store joins the Silicon Engineering Group to drive architecture and RTL development for performant cores. This role involves owning micro-architecture development and specification, ranging from high-level exploration to detailed specifications. The engineer will develop, assess, and refine RTL designs to meet specific power, performance, area, and timing goals. Key responsibilities include supporting verification through test bench development, formal methods, and simulation, as well as performing performance exploration and correlation. Required skills include microprocessor architecture knowledge, logic design principles, Verilog or VHDL, and experience with simulators and waveform debugging. Preferred expertise includes out-of-order execution, instruction scheduling, load/store execution, and cache subsystems. Candidates should also possess C, C++, Perl, or Python programming skills to solve complex CPU integer and floating-point execution problems.

Skills

RTL Design Microarchitecture Verilog VHDL C C++ Python Perl Logic Design Formal Methods Simulation Emulation Out-of-Order Execution Instruction Scheduling Cache Memory Subsystems Waveform Debugging

What you'll do

  • Develop and specify micro-architecture from high-level exploration to detailed technical specifications.
  • Own the development, assessment, and refinement of RTL design to meet power, performance, area, and timing goals.
  • Support the verification team in developing test benches, formal methods, and simulation/emulation for functional verification.
  • Explore high-performance strategies and correlate RTL design performance against targeted metrics.
  • Implement and verify physical design aspects including timing, area, reliability, testability, and power.
  • Drive architecture and RTL development for CPU integer, floating-point, and load/store execution units.

What we're looking for

  • Minimum BS degree and 10+ years of relevant industry experience.
  • Experience with microprocessor architecture.
  • Experience with logic design principles with timing and power implications.
  • Experience in Verilog or VHDL.
  • Experience with simulators and waveform debugging processes.
  • Expertise in out-of-order execution, instruction scheduling, integer/floating-point execution, load/store execution, or cache and memory subsystems (preferred).
  • Understanding of low power microarchitecture techniques (preferred).
  • Understanding of high-performance techniques and trade-offs in a CPU microarchitecture (preferred).

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