Circuit Design Engineer

Nvidia

Confirmed live yesterday Trusted

Quick summary

Work type: On-site
Location: Santa Clara, CA
Employment: Full-time
Posted: 138 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

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About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

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At a glance

TL;DR · Circuit Design Engineer

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Circuit Design Engineer - New College Grad 2026 will join the team to work on standard cell library design and characterization for cutting-edge processors using deep submicron technologies. The role involves driving transistor level circuit design, modeling, and performance analysis processes. Key responsibilities include developing new simulations for timing, power, noise, and OCV evaluations, as well as supporting tool development and improving quality checks on library work. Candidates must possess a background in deep submicron process issues and the characterization of standard cell libraries. Required technical skills include experience with SPICE simulation, Liberty models, and digital implementation flows. Proficiency in scripting languages like Perl, Python, Tcl, and Make is also required to support automation methods and algorithms within the design and verification workflow.

Skills

Circuit Design Standard Cell Characterization Python Perl Tcl SPICE Liberty Models Make OCV Digital Implementation Signoff Flows Automation Deep Submicron Process

What you'll do

Design and characterize standard cell libraries using deep submicron technologies.
Drive transistor-level circuit design, modeling, and performance analysis processes.
Develop and support internal tools using Perl and Python.
Create new simulations to perform timing, power, noise, and OCV evaluations.
Improve quality checks and resolve issues related to library work.
Generate timing, power, noise, and OCV views for standard cells.
Validate data and manage quality assurance processes for standard cell libraries.
Run SPICE simulations and adapt to new simulation tools as needed.

What we're looking for

MS in Electrical or Computer Engineering or equivalent experience.
Background in deep submicron process issues.
Understanding of standard cell library design, verification, characterization, and timing/power/noise/OCV views.
Familiarity with Liberty models and their application to digital implementation and signoff flows.
Experience running SPICE simulations and the capability to adapt to new simulation tools.
Proficiency in scripting languages such as Perl, Tcl, and Make (preferred).
Proficiency in automation methods and algorithms (preferred).
Past standard cell library or IP characterization experience (preferred).

ASIC Design Engineer

Nvidia

Santa Clara, CA 102 days ago $100,000–$166,750

Verilog RTL Design ASIC Design Flow Logic Synthesis Timing Closure Computer Architecture Cache Coherency DFT Timing Analysis Floor-planning ECO Logic Debug high speed interconnects Prototyping Bring-up Lab Debug

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