ASIC Verification Engineer

Broadcom

Quick summary

Work type
On-site
Location
Irvine, CA
Salary
$91,000–$146,000 / yr
Posted
75 days ago
Closes
Jun 18, 2026

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $187k
This role $118k
$76k most similar roles pay here $234k

This role pays less than 97% of similar roles. Most pay $159,525–$214,600 — the shaded band above. At the midpoint, this role pays about $118k versus about $187k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 61 open roles on FindRole.

Listed pay typically runs $120,000–$192,000 across 60 roles with salary data.

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View all roles at Broadcom

At a glance

TL;DR · ASIC Verification Engineer

Join Broadcom’s High Speed Interconnect Product (HSIP) team as an ASIC Verification Engineer, where you will play a pivotal role in developing the world's fastest networks by verifying cutting-edge communication silicon. Your responsibilities include mastering IEEE Ethernet protocols, building advanced verification environments using SystemVerilog UVM, and ensuring first-pass silicon success through comprehensive block and chip-level verification. You will also innovate processes by creating custom scripts to enhance design quality and verification efficiency. Ideal candidates are new MSEE/CS graduates or BSEE/CS professionals with 3+ years of ASIC experience, possessing strong logic design and networking protocol knowledge, proficiency in SystemVerilog, Verilog, or VHDL, and a preference for C/C++ and scripting languages like Python or Perl.

What you'll do

  • Develop deep understanding of latest IEEE Ethernet protocols.
  • Design and maintain advanced verification environments using SystemVerilog UVM.
  • Own the verification process at block and chip levels for first-pass success.
  • Innovate custom scripts and tools to enhance verification efficiency and design quality.
  • Work alongside architecture, design, and firmware teams throughout product lifecycle.

What we're looking for

  • Bachelor’s or Master’s degree in Electrical Engineering or Computer Science with relevant experience.
  • Proficiency in SystemVerilog, Verilog, or VHDL for HDL design and verification.
  • Experience designing and maintaining advanced verification environments using UVM.
  • Strong understanding of IEEE Ethernet protocols and networking standards.
  • Ability to develop custom scripts and tools to enhance verification efficiency.
  • Quick learning capability and effective communication skills for complex technical concepts.

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