ASIC Engineering Technical Leader, CDC

Cisco

Remote

Quick summary

Work type
Remote
Location
Remote
Salary
$183,800–$263,600 / yr
Posted
2 days ago
Closes
Sep 1, 2026

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $194k
This role $224k
$139k most similar roles pay here $277k

This role pays more than 79% of similar roles. Most pay $165,400–$222,000 — the shaded band above. At the midpoint, this role pays about $224k versus about $194k for comparable roles.

Based on 240 similar postings.

Employer

About Cisco

Cisco Systems is the world''s leading networking technology company, designing and manufacturing networking hardware, telecommunications equipment, and cybersecurity solutions for businesses and governments. Industry: Networking Technology & Cybersecurity

Cisco currently has 186 open roles on FindRole.

Listed pay typically runs $165,000–$241,400 across 186 roles with salary data.

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View all roles at Cisco

At a glance

TL;DR · ASIC Engineering Technical Leader, CDC

Role Posting Log in to save

Join Cisco’s multi-disciplined engineering team as a senior ASIC designer responsible for defining and verifying complex subsystems deployed across various platforms. You will lead CDC/RDC methodology in silicon chips, design robust RTL with thorough consideration of clock domain crossing and reset domain crossing, and develop comprehensive check flows in collaboration with the CAD team. Daily tasks include reviewing constraints, approving waivers, conducting static glitch analysis, and enhancing designs to prevent hazards. Ideal candidates have extensive experience in RTL development, CDC/RDC concepts, SDC constraint creation, and VCS simulation using SystemVerilog Assertions. This role demands expertise in high-volume, quality-driven ASIC design for large-scale networking solutions.

Skills

SystemVerilog RTL CDC RDC SDC VCS SVA Static Glitch Analysis

What you'll do

  • Leads CDC/RDC methodology implementation in silicon chips.
  • Designs and implements robust RTL considering CDC/RDC.
  • Specifies comprehensive CDC/RDC check flows with CAD team.
  • Reviews and approves CDC/RDC constraints and waivers.
  • Performs static glitch analysis to prevent design hazards.

What we're looking for

  • Bachelor’s with 8+ years or master’s with 6+ years of relevant experience in ASIC design.
  • Strong RTL development skills and extensive CDC/RDC implementation experience.
  • Expertise in maintaining CDC/RDC flow and approving constraints and waivers.
  • Proficient in static glitch analysis on synthesis-optimized gate netlists.
  • Experience in SDC constraint development and VCS simulation with SystemVerilog Assertions.

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