ASIC Design Efficiency Engineer

Nvidia

Quick summary

Work type
On-site
Location
Santa Clara, CA · Austin, TX · Durham, NC
Salary
$116,000–$189,750 / yr
Posted
4 days ago

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $191k
This role $153k
$103k most similar roles pay here $236k

This role pays less than 82% of similar roles. Most pay $165,250–$216,250 — the shaded band above. At the midpoint, this role pays about $153k versus about $191k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 563 open roles on FindRole.

Listed pay typically runs $168,000–$264,500 across 556 roles with salary data.

Most-posted roles

View all roles at Nvidia

At a glance

TL;DR · ASIC Design Efficiency Engineer

NVIDIA is seeking an ASIC Design Efficiency Engineer to join its dynamic and innovative team focused on developing cutting-edge hardware accelerators and processors for mobile, embedded, and datacenter platforms. In this role, you will develop advanced HW, GPU, and system designs to enhance performance and efficiency, working closely with architects, designers, verification teams, and VLSI experts to create industry-leading GPUs. Your daily tasks include understanding design implementations, developing methodologies and infrastructure to improve Performance, Power, and Area (PPA), and delivering fully verified RTL code that meets high standards of efficiency. Ideal candidates have a Bachelor’s degree in Electrical or Computer Engineering, 2+ years of relevant experience, proficiency in SystemVerilog, and knowledge of Python or Perl scripting. Experience with pipeline processor design, deep learning accelerators, performance verification, low power design, and physical synthesis is highly desirable.

What you'll do

  • Develop innovative hardware designs for GPUs and processors.
  • Drive improvements in performance, power consumption, and area efficiency.
  • Deliver high-performance RTL that meets design targets and is fully verified.
  • Craft methodologies to enhance the performance of industry-leading GPUs.
  • Collaborate with verification teams to ensure design quality and efficiency.

What we're looking for

  • 2+ years of relevant ASIC design experience.
  • Bachelor’s degree in Electrical Engineering or Computer Engineering.
  • Proficiency in SystemVerilog or similar HDL.
  • Strong understanding of logic design and computer architecture.
  • Experience with pipeline processor or deep learning accelerator design.
  • Knowledge of performance verification, low power, or physical design.
  • Scripting skills in Python or Perl.

More like this

Similar roles

ASIC Design Engineer

Nvidia

Santa Clara, CA 67 days ago $116,000$189,750
Verilog Perl Python C C++ Kubernetes Terraform CI/CD Docker PostgreSQL Git Jenkins Prometheus Grafana

Senior ASIC Design Engineer

Nvidia

Santa Clara, CA 88 days ago $168,000$264,500
Verilog RTL C C++ Python Perl VLSI Computer_Architecture Digital_Systems Logic_Synthesis Timing_Analysis
Hybrid

Senior ASIC Design Engineer

Nvidia

Santa Clara, CA 17 days ago $168,000$264,500
Verilog System-Verilog RTL ASIC Logic Design Computer Architecture Digital Systems Timing Analysis ECO Post Silicon Debug Arbiters Scheduling Synchronization Bus Protocols Interconnect Networks Switches Virtual Channels

Senior ASIC Design Engineer

Nvidia

Santa Clara, CA 80 days ago $136,000$218,500
Verilog SystemVerilog Perl Python VCS Verdi GDB Random Stimulus Functional Coverage Assertion-Based Verification Logic Synthesis Timing Analysis Embedded Processors

ASIC Verification Engineer

Nvidia

Santa Clara, CA 37 days ago $116,000$189,750
C++ SystemVerilog UVM VCS Debussy GDB Python CI/CD ASIC SoC GPU Verification methodology Random stimulus Functional coverage Assertion-based verification
Hybrid

Careers

Qualcomm

Santa Clara, CA 86 days ago
Python Perl AMBA AHB APB AXI PCIe USB CoreSight AI/ML DFT FPGA CDC Clocking_architecture NoC