Analog Layout Automation Engineer

Apple Inc

Quick summary

Work type: On-site
Location: Cupertino, CA
Salary: $121,306–$213,700 / yr
Posted: 43 days ago

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $179k

This role $168k

$110k most similar roles pay here $225k

This role pays less than 53% of similar roles. Most pay $150,000–$207,287 — the shaded band above. At the midpoint, this role pays about $168k versus about $179k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 638 open roles on FindRole.

Listed pay typically runs $171,600–$272,100 across 505 roles with salary data.

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At a glance

TL;DR · Analog Layout Automation Engineer

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Join our dynamic team as an Analog Layout Automation Engineer, where you will contribute to the development of high-performance analog and mixed-signal circuits including SerDes, PLLs, and sensors. Your role involves collaborating with circuit designers to create silicon designs using advanced CAD tools, particularly those enhanced by AI/ML techniques. Daily tasks include reviewing floor plans, analyzing circuits, running verification suites, and resolving LVS/DRC/ERC issues while driving automation through scripting and workflow improvements. Ideal candidates possess strong skills in SKILL, Perl, TCL, Shell, Python, and PyTorch for model development, along with a solid understanding of AI concepts such as CNNs and training principles. Experience with Cadence Virtuoso features and Innovus is preferred, alongside expertise in custom floor planning, hierarchical layout assembly, and physical integration.

Skills

Python TCL Perl Shell SKILL PyTorch Cadence_Virtuoso DRC ERC LVS CNN Loss_Functions Backpropagation Optimization PCell_Creation Hierarchical_Layout_Assembly Custom_Floor_Planning Standard_Cell_Floor_Planning Physical_Integration Image_Processing Segmentation Object_Detection

What you'll do

Develop high-performance analog and mixed-signal layouts using advanced CAD tools.
Automate layout tasks and improve workflows with scripting and AI/ML techniques.
Resolve LVS/DRC/ERC issues to ensure design integrity and quality.
Apply machine learning for layout optimization and verification acceleration.
Create scripts and productivity tooling to enhance layout automation processes.
Interpret physical verification reports and implement reliability solutions.

What we're looking for

Extensive experience in designing analog and mixed-signal layouts in deep-submicron CMOS and FinFET technologies.
Proficient programming skills in SKILL, Perl, TCL, Shell, Python for layout automation and data analysis.
Strong understanding of AI/ML techniques including CNNs and core training concepts like loss functions and backpropagation.
Hands-on experience automating layout tasks using scripting and CAD tools to improve productivity and quality.
Proven ability to implement high-quality analog layouts with tight device matching, low noise, and power efficiency.
Expertise in physical verification reports (DRC, ERC, LVS) interpretation and resolving layout-related issues.
Familiarity with advanced Cadence Virtuoso features and Innovus for efficient design and automation.

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