Analog ASIC Architect

Apple Inc

Quick summary

Work type
On-site
Location
Austin, TX
Posted
25 days ago

Market check

Salary context

How this pay compares to similar roles

Similar $194k
$140k most similar roles pay here $234k

This listing doesn't post a salary. Most similar roles pay $165,250–$222,425.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 638 open roles on FindRole.

Listed pay typically runs $171,600–$272,100 across 505 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · Analog ASIC Architect

Apply Now Log in to save

As an Analog ASIC Architect on Apple's Touch Technology team, you will lead the architecture of complex mixed-signal ASICs for touch sensing applications across various devices like iPhone, iPad, and Mac. Your role involves translating system requirements into detailed micro-architecture specifications and performance analyses to guide IC development. You will build high-level behavioral models to evaluate trade-offs and validate system performance while collaborating closely with circuit design, digital architecture, software, and product teams. Key responsibilities include leading cross-disciplinary assessments of power, performance, area, and manufacturability, contributing to strategic roadmap planning, and resolving silicon performance issues from characterization through production. The ideal candidate has experience in AFE design, ADC/DAC topologies, noise analysis, and signal chain optimization, along with proficiency in MATLAB or Python for modeling and simulation.

Skills

MATLAB Python Analog front-end (AFE) design ADC/DAC topologies Noise analysis Signal chain optimization IC micro-architecture definition High-level modeling and simulation tools Silicon characterization Debug at the system level Circuit design Digital architecture Software integration Root cause analysis

What you'll do

  • Define and develop analog front-end (AFE) and mixed-signal ASIC architectures for touch sensing applications.
  • Author detailed micro-architecture specifications and performance analyses guiding IC development.
  • Build behavioral models to evaluate architectural trade-offs and validate system performance.
  • Lead cross-disciplinary assessments of power, performance, area, and manufacturability constraints.
  • Contribute technical expertise to strategic roadmap planning and technology investment decisions.
  • Perform root cause analysis and drive resolution of silicon performance issues from characterization through production.

What we're looking for

  • Extensive experience in analog and mixed-signal ASIC architecture.
  • Proven ability to define and tape out complex mixed-signal ICs from concept to production.
  • Strong foundation in system-level design and requirements development for mixed-signal ASICs.
  • Expertise in IC bring-up, silicon characterization, and debug at the system level.
  • Proficiency in high-level modeling and simulation tools like MATLAB or Python.

Related searches

More Analog ASIC Architect jobs Analog ASIC Architect jobs in Austin All jobs at Apple Inc

More like this

Similar roles

Analog ASIC Architect

Apple Inc

San Francisco, CA 25 days ago $181,100–$318,400
MATLAB Python Analog front-end (AFE) design ADC/DAC topologies Noise analysis Signal chain optimization IC micro-architecture definition High-level behavioral models Power Performance Area Manufacturability Cross-disciplinary trade-off assessments Silicon characterization Debugging
Save

Careers

Qualcomm

San Diego, CA 29 days ago
Verilog SystemVerilog VHDL Python Perl RTL SoC ASIC Clock_design Power_related_features Design_verification Simulation Scripting_languages Automation_tools
Save

ASIC Design Engineer

Broadcom

Irvine, CA 65 days ago $108,000–$172,800
EDA Synthesis Design_for_Test Floorplanning Place_and_Route Clock_Methodology Power_Planning_Analysis Timing_Closure Signal_Integrity Physical_Design_Checks
Save

Careers

Qualcomm

Santa Clara, CA 86 days ago
Python Perl AMBA AHB APB AXI PCIe USB CoreSight AI/ML DFT FPGA CDC Clocking_architecture NoC
Save

ASIC Design Engineer

Nvidia

Santa Clara, CA 67 days ago $116,000–$189,750
Verilog Perl Python C C++ Kubernetes Terraform CI/CD Docker PostgreSQL Git Jenkins Prometheus Grafana
Save

Senior ASIC Design Engineer - Hardware

Nvidia

Santa Clara, CA 148 days ago $136,000–$218,500
Verilog RTL Python Perl C C++ PCI-Express CXL ASIC VLSI Digital systems Computer Architecture CMOS transistors and circuits DFT timing analysis floor-planning ECO bring-up & lab debug arbiters synchronization bus protocols interconnect networks caches
Save