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PCB Layout Allegro FPGA Verilog VHDL Python Lua C C++ USB 3.2 USB-PD Display Port PCIe I2C SPI DFT Data Analysis +12 more Show less

C C++ Objective-C Digital Signal Processing DSP Control Systems Test Automation Circuit Analysis Electromechanical Systems Root Cause Analysis NPI Modeling Simulations Algorithms +9 more Show less

Verilog SystemVerilog RTL Design SoC PCIe HBM AMBA AXI DMA Synthesis Timing Constraints CDC Lint RDC DFT Python Perl Agile Post-Silicon Debug +13 more Show less

Software Systems Architecture Python XML Perl Interface Design Traceability Verification Validation User Interface Design Project Management +5 more Show less

FPGA Circuit Analysis Hardware Design Troubleshooting AI

MBSE Cameo MagicDraw DOORS SysML DoDAF Digital Engineering Requirements Management Systems Engineering Cloud Systems Virtual Machines Modeling and Simulation CAM SPI CPI Microsoft Office +11 more Show less

Generative AI LLMs RAG Vector Databases AWS Azure Google Cloud Platform Microservices Distributed Systems API Architecture DevSecOps CI/CD Platform Engineering +8 more Show less

PCB Design PCB Layout System Validation Oscilloscopes Multimeters Logic Analyzers Linux Windows Tegra SoC GPU Bringup +6 more Show less

PCB Design Oscilloscopes Multimeters Logic Analyzers Linux Windows GPU Tegra System Design +4 more Show less

Ethernet SerDes Python Broadcom SDK Redfish API IPMI BMC OpenBMC FEC PAM4 LinkCAT Signal Integrity PRBS Test Automation Hardware Bring-up Firmware PCB Layout Oscilloscope Protocol Analyzer +14 more Show less

React TypeScript Figma Design Systems Style Dictionary Storybook CI/CD CSS Custom Properties pnpm Turborepo Changesets SemVer React Aria DTCG Design Tokens Monorepos Visual Regression Testing +11 more Show less

React TypeScript Figma Design Systems Style Dictionary Storybook CI/CD Accessibility ARIA CSS Custom Properties pnpm Turborepo Changesets SemVer Radix React Aria DTCG Monorepos Linting +14 more Show less

React TypeScript Python Node.js HTML CSS Storybook GitHub Claude Code MCP CI/CD WCAG 2.2 AA Axe Figma OutSystems data-visualization SDLC +12 more Show less

Digital Signal Processing MATLAB C/C++ Serdes RTL Firmware Communication Theory PAM FEC CDR PCIe IEEE 802.3 OIF Signal Processing Algorithms +9 more Show less

Signal Integrity FPGA Xilinx Altera HDL SERDES DDR3 DDR4 DDR5 I2C JTAG UART SPI PCIe eMMC Linux Mentor Graphics DxDesigner Vivado Quartus HyperLynx Sigrity PowerSI PowerDC ADS Ansys HFSS SPICE Python Perl +22 more Show less

Creo SolidWorks CAD Finite Element Analysis (FEA) Design for Manufacturability (DFM) Design for Reliability (DFR) Tolerance Analysis Thermal Management Liquid Cooling Sheet Metal Injection Molding Die Casting Extrusion Data Analysis Optics +10 more Show less

React TypeScript CSS Figma Storybook Git WCAG 2.1+ ARIA Headless UI Generative AI GitHub Copilot Cursor Claude Code Agile System Design Front-end Performance Optimization +11 more Show less

CAD PLM MES ERP AI System Architecture GD&T Model-Based Definition Simulation Robotics +5 more Show less

MATLAB Simulink Model-Based Systems Engineering IBM Rational DOORS C C++ Assembly Java VHDL Verilog SystemVerilog SystemC RS-232 I2C SPI PCIe Ethernet SRIO Xilinx Microsemi Texas Instruments Intel Visual Studio Qt Jira Git Agile EVMS Microsoft Project +24 more Show less

SystemVerilog UVM C++ Python Perl GPU Design Verification RTL Constrained-Random Testing Functional Coverage Computer Architecture Hardware Modeling Emulation Performance Profiling Coherent Interconnects +9 more Show less