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Senior DFT/ATPG Engineer, Mixed-Signal IP

Amd

Fort Collins, CO 9 days ago $200,000–$300,000
Actively hiring Confirmed live yesterday High trust Above market
ATPG DFT Scan Design Gate-Level Simulation Fault Simulation Python Perl Tcl SDF Mixed-Signal IP Silicon Bring-up Post-Silicon Debug Failure Analysis waveform-debug
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Senior DFT Engineer

Amazon Inc

San Diego, CA 43 days ago $185,200–$250,000
Actively hiring Confirmed live yesterday High trust Above market
DFT MBIST JTAG ASIC Design RFIC Mixed Signal ATE AI/ML CMOS Hardware Development
5+ yrs exp
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Senior ASIC DFT Engineer

SpaceX

Austin, TX +2 136 days ago
Actively hiring Confirmed live yesterday Low trust
ASIC DFT Siemens Tessent ATPG Python Perl Tcl C++ ATE Post-Silicon Validation Gate-Level Simulation SDF IEEE 1500 IEEE 1149.1 BIST Scan Insertion Failure Analysis
5+ yrs exp
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Senior ASIC DFT Engineer

SpaceX

Irvine, CA +2 136 days ago $165,000–$260,000
Actively hiring Confirmed live yesterday Low trust Competitive pay
ASIC DFT Siemens Tessent ATPG Python Perl Tcl C++ Post-Silicon Validation ATE Teradyne Advantest SDF IEEE 1500 IEEE 1149.1 Scan Insertion BIST
5+ yrs exp
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Senior ASIC DFT Engineer

SpaceX

Palo Alto, CA +2 136 days ago $175,000–$280,000
Actively hiring Confirmed live yesterday Low trust Above market
ASIC DFT Siemens Tessent ATPG Python Perl Tcl C++ Post-Silicon Validation ATE Teradyne Advantest SDF Gate-Level Simulation IEEE 1500 IEEE 1149.1 BIST Scan Insertion
5+ yrs exp
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