Browse tech roles

Basic role filtering by workplace, salary floor, and post age. For full AI matching and advanced filtering upload your resume using AI Match.

9 of up to 20 (filtered)

CPU Microarchitect/RTL Engineer, Execution, Load/Store

Apple Inc

Waltham, MA 40 days ago $165,800–$292,400
Actively hiring Confirmed live today Trusted Competitive pay
RTL Design Microarchitecture Verilog VHDL C C++ Python Perl Logic Design Formal Methods Simulation Emulation Out-of-Order Execution Instruction Scheduling Load/Store Execution
10+ yrs exp

CPU Microarchitect/RTL Engineer, Execution, Load/Store

Apple Inc

Santa Clara, CA 40 days ago $184,700–$324,800
Actively hiring Confirmed live today Trusted Above market
RTL Design Microarchitecture Verilog VHDL C C++ Python Perl Logic Design Formal Methods Simulation Emulation Out-of-Order Execution Instruction Scheduling Waveform Debugging
10+ yrs exp

CPU Microarchitect/RTL Engineer, Execution, Load/Store

Apple Inc

Beaverton, OR 40 days ago
Actively hiring Confirmed live today Low trust
RTL Design Microarchitecture Verilog VHDL C C++ Python Perl Logic Design Formal Methods Simulation Emulation Out-of-Order Execution Instruction Scheduling Cache Memory Subsystems Waveform Debugging
10+ yrs exp

CPU Microarchitect/RTL Engineer, Execution, Load/Store

Apple Inc

Santa Clara, CA 40 days ago $150,400–$277,600
Actively hiring Confirmed live yesterday Trusted Competitive pay
RTL Design Microarchitecture Verilog VHDL C C++ Python Perl Logic Design Formal Methods Simulation Emulation Waveform Debugging Out-of-Order Execution Instruction Scheduling Load/Store Execution
3+ yrs exp

CPU Microarchitect/RTL Engineer, Execution, Load/Store

Apple Inc

Waltham, MA 40 days ago $165,800–$292,400
Actively hiring Confirmed live today Trusted Competitive pay
RTL Design Microarchitecture Verilog VHDL C C++ Python Perl Logic Design Formal Methods Simulation Emulation Waveform Debugging Out-of-Order Execution Instruction Scheduling Load/Store Execution
10+ yrs exp

CPU Microarchitect/RTL Engineer, Execution, Load/Store

Apple Inc

Santa Clara, CA 40 days ago $184,700–$324,800
Actively hiring Confirmed live today Trusted Above market
RTL Design Microarchitecture Verilog VHDL C C++ Python Perl Logic Design Formal Methods Simulation Emulation Waveform Debugging Out-of-Order Execution Instruction Scheduling Load/Store Execution
10+ yrs exp

CPU Microarchitect/RTL Engineer, Execution, Load/Store

Apple Inc

Beaverton, OR 40 days ago
Actively hiring Confirmed live yesterday Low trust
RTL Design Microarchitecture Verilog VHDL C C++ Python Perl Formal Methods Simulation Emulation Out-of-Order Execution Instruction Scheduling Load/Store Execution Logic Design Waveform Debugging
10+ yrs exp

CPU Microarchitect/RTL Engineer, Execution, Load/Store

Apple Inc

Santa Clara, CA 40 days ago $150,400–$277,600
Actively hiring Confirmed live today Trusted Competitive pay
RTL Design Microarchitecture Verilog VHDL C C++ Python Perl Logic Design Formal Methods Simulation Emulation Out-of-Order Execution Instruction Scheduling Load/Store Execution
3+ yrs exp

CPU Microarchitect/RTL Engineer, Execution, Load/Store

Apple Inc

Santa Clara, CA 66 days ago $129,300–$194,700
Actively hiring Confirmed live yesterday Low trust Below market
RTL Design Microarchitecture Verilog VHDL C++ C Python Perl Formal Methods Simulation Emulation Logic Design Out-of-Order Execution Instruction Scheduling Load/Store Execution