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Active Keyword: High-Speed IP Remove filter Clear all

6 of up to 20 (filtered)

SIPI Architect for High-Speed SerDes

Apple Inc

Austin, TX 18 days ago
Actively hiring Confirmed live today High trust
SerDes Power Integrity Ethernet PCIe UAL CXL Channel Modeling Link Budget Analysis COM TX/RX Equalization Co-packaged Optics (CPO) 2.5D/3D Integration PDN High-Performance Computing (HPC)
10+ yrs exp
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SIPI Architect for High-Speed SerDes

Apple Inc

San Francisco, CA 18 days ago $184,700–$324,800
Actively hiring Confirmed live today High trust Above market
SerDes Power Integrity SIPI Ethernet PCIe UAL CXL Channel Modeling Link Budget Analysis COM Time-Domain Simulation TX/RX Equalization Co-packaged Optics (CPO) 2.5D/3D Integration PDN Thermal Co-design ASIC
10+ yrs exp
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SIPI Architect for High-Speed SerDes

Apple Inc

Austin, TX 18 days ago
Actively hiring Confirmed live today High trust
SerDes Power Integrity Ethernet PCIe UAL CXL Channel Modeling Link Budget Analysis COM TX/RX Equalization Co-packaged Optics (CPO) 2.5D/3D Integration PDN High-Performance Computing (HPC)
10+ yrs exp
Save

SIPI Architect for High-Speed SerDes

Apple Inc

San Francisco, CA 18 days ago $262,500–$394,000
Actively hiring Confirmed live today High trust Above market
SerDes Power Integrity SIPI Ethernet PCIe UAL CXL Channel Modeling Link Budget Analysis COM Time-domain Simulation TX/RX Equalization Co-packaged Optics (CPO) 2.5D/3D Integration PDN Thermal Co-design ASIC
10+ yrs exp
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Principal Design Engineer - High-Speed Interconnect

Arm Holdings

Austin, TX 75 days ago $249,900–$338,100
Actively hiring Confirmed live today High trust Above market
SystemVerilog RTL PCIe CXL UALink AXI CHI ACE APB CDC RDC Formal Verification Synthesis Timing Analysis Waveform Debug Microarchitecture Memory Systems High-speed I/O
8+ yrs exp Hybrid
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Principal High-Speed I/O Architect

Arm Holdings

San Jose, CA +1 167 days ago $262,700–$355,400
Actively hiring Confirmed live today High trust Above market
PCIe CXL UA Link SoC Architecture Coherency Protocols Cache Design Memory Systems Heterogeneous Compute Chiplet Connectivity Performance Modeling Firmware System Software Physical Design
10+ yrs exp Hybrid
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