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Active Keyword: SoC Design Verification Engineer Remove filter Location: Sunnyvale Remove filter Clear all

8 of up to 20 (filtered)

SoC Design Verification Engineer

Apple Inc

Sunnyvale, CA 2 days ago $129,300–$225,300
Actively hiring Confirmed live yesterday Posted this week High trust Competitive pay
SystemVerilog UVM Python C++ Digital Design SoC Architecture PCIe DDR SPI I2C UART AIML HVL Object-Oriented Programming Memory Management low-power architecture
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SoC Design Verification Engineer

Apple Inc

Sunnyvale, CA 2 days ago $184,700–$324,800
Actively hiring Confirmed live today Posted this week High trust Above market
SystemVerilog UVM Python C++ Java Digital Design SoC Architecture PCIe DDR SPI I2C UART AIML HVL
10+ yrs exp
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Wireless SOC Design Verification Engineer

Apple Inc

Sunnyvale, CA 2 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday Posted this week High trust Above market
SystemVerilog UVM Formal Verification UPF ASIC PCIe AXI AHB NOC WiFi Bluetooth Post-Silicon Bring-up RTL SOC Integration SPI UART AI-assisted Verification
10+ yrs exp
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SOC Design Verification Engineer

Apple Inc

Sunnyvale, CA 2 days ago $129,300–$225,300
Actively hiring Confirmed live yesterday Posted this week High trust Competitive pay
SystemVerilog Verilog UVM UPF Python C++ Perl Formal Verification JasperGold ASIC SOC PCIe AXI AHB SVA WiFi Bluetooth
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SOC Design Verification Engineer

Apple Inc

Sunnyvale, CA 2 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday Posted this week High trust Above market
SystemVerilog UVM Verilog UPF Python C C++ Formal Verification JasperGold SVA PCIe AXI AHB WiFi Bluetooth RTL Perl Assembly
10+ yrs exp
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Wireless SOC Design Verification Engineer

Apple Inc

Sunnyvale, CA 2 days ago $129,300–$225,300
Actively hiring Confirmed live yesterday Posted this week High trust Competitive pay
SystemVerilog UVM Formal Verification UPF PCIe AXI AHB WiFi Bluetooth SOC Integration RTL Post-Silicon Bring-up Bus Fabric NOC Power Management Unit SPI UART
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SOC Design Verification Engineer

Apple Inc

Sunnyvale, CA 14 days ago $129,300–$225,300
Actively hiring Confirmed live today Trusted Competitive pay
SystemVerilog UVM Verilog UPF Python C C++ Formal Verification JasperGold PCIe AXI AHB SVA ASIC SOC Perl Assembly
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SOC Design Verification Engineer

Apple Inc

Sunnyvale, CA 14 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday Trusted Above market
SystemVerilog UVM Verilog UPF Python C C++ Formal Verification JasperGold PCIe AXI AHB SVA Perl RTL ASIC SOC WiFi Bluetooth
10+ yrs exp
Save