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Active Keyword: ASIC Physical Design Engineer Remove filter Location: Santa Clara Remove filter Clear all

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ASIC Physical Design Engineer, Netlisting

Nvidia

Santa Clara, CA +1 29 days ago $116,000–$189,750
Actively hiring Confirmed live 2 days ago High trust Below market
ASIC Physical Design Logic Synthesis Formal Verification Equivalence Checking RTL Timing Closure Clock Domain Crossing MTBF Analysis Synopsys Cadence Python TCL Perl Make EDA Tools Netlisting ECO Generation
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Senior ASIC Physical Design Engineer, Cache Coherent Interconnects

Nvidia

Santa Clara, CA +1 32 days ago $136,000–$218,500
Actively hiring Confirmed live 2 days ago High trust Competitive pay
Physical Design Synthesis Timing Analysis Floor-planning Verilog ASIC Design Flow RTL Design Verification DFT ECO High-frequency Design Micro-architecture
5+ yrs exp
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Senior ASIC Physical Design Engineer, Netlisting

Nvidia

Santa Clara, CA +1 37 days ago $136,000–$218,500
Actively hiring Confirmed live 2 days ago High trust Competitive pay
ASIC Physical Design Logic Synthesis Static Timing Analysis (STA) Equivalence Checking DFT Python TCL Perl Make EDA Tools Netlist Quality Check Timing Closure ECO Generation Hardware Architecture
5+ yrs exp Hybrid
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ASIC Physical Design and Timing Engineer

Nvidia

Santa Clara, CA 51 days ago $116,000–$189,750
Actively hiring Confirmed live 2 days ago High trust Below market
Static Timing Analysis STA ASIC Physical Design Synthesis Floor-planning CTS Routing Equivalence Checking Timing Constraints Power Convergence ECO AI LLM
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