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Schematic Capture Circuit Design FPGA CPLD Board Bring-up Signal Integrity Verilog VHDL Python Perl Tcl Spectrum Analyzers Protocol Analyzers Digital Logic +9 more Show less

Schematic Capture Circuit Design FPGA CPLD Board Bring-up Signal Integrity High-Speed Interface Design Verilog VHDL Python Perl Tcl Spectrum Analyzers Signal Generators eLoads Protocol Analyzers +11 more Show less

ASIC Design Python Scripting Vector Databases MoE SoC Data Analysis +2 more Show less

x86 SoC Signal Integrity Power Delivery Network DDR4/5 LPDDR4/5 Ethernet Linux Windows Server C C++ Python Perl Oscilloscope JBERT Circuit Design root-cause analysis +12 more Show less