Verification Platform Engineer, Platform Architecture

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Austin, TX
Posted
8 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

How this pay compares to similar roles

Similar $177k
$111k most similar roles pay here $232k

This listing doesn't post a salary. Most similar roles pay $151,000–$202,561.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · Verification Platform Engineer, Platform Architecture

The Verification Platform Engineer, Platform Architecture joins the Platform Architecture group to develop high-performance verification systems that accelerate the development of Apple silicon. This role bridges next-generation platform technology with design verification methodology and tooling to improve simulation throughput for design verification workflows. You will own engagements with silicon engineering groups to evaluate, integrate, and maintain RTL simulation tools while modifying testbenches and design RTL for efficiency. Key responsibilities include designing infrastructure improvements for faster turnaround after RTL changes and utilizing EDA tools like Logic Equivalence Checking, wave dumps, and design libraries. Required skills include SystemVerilog, C++, Perl, or Python scripting, and experience with UVM, DPI-C, and testbench architecture. The role addresses the technical challenge of pre-silicon validation by applying principles from hardware emulation to create advanced simulation solutions for complex silicon designs.

What you'll do

  • Evaluate, integrate, and maintain high-performance RTL simulation tooling with silicon engineering groups.
  • Modify testbench and design RTL to improve tool compatibility and simulation efficiency.
  • Utilize EDA tools like LEC and wave dumps to diagnose issues and explore design alternatives.
  • Design and integrate infrastructure improvements to accelerate simulation turnaround after RTL changes.
  • Develop advanced verification methodologies using SystemVerilog, UVM, and DPI-C.
  • Implement software optimizations for high-performance computing and co-simulation architectures.
  • Build agentic pipelines and tools to enable AI productivity for other engineers.

What we're looking for

  • Bachelor's degree in Computer Engineering, Electrical Engineering, or a related field (or equivalent practical experience).
  • Master's degree in Computer Engineering, Electrical Engineering, or another hardware-related field is preferred.
  • 10+ years of relevant experience is preferred.
  • Experience with SystemVerilog and EDA tooling.
  • Experience with software development using C++ and scripting using Perl or Python.
  • Deep hands-on experience in Design Verification methodologies including UVM, DPI-C, and testbench architecture.
  • Experience with LEC, linting/static analysis tools, waveform debugging, and simulation/emulation flows.
  • Experience with software optimization, high-performance computing (HPC), co-simulation architectures, or hardware acceleration.

More like this

Similar roles

Verification Platform Engineer, Platform Architecture

Apple Inc

Austin, TX 8 days ago
SystemVerilog UVM C++ Python Perl EDA Tools RTL Simulation Logic Equivalence Checking DPI-C High-Performance Computing Co-simulation Hardware Emulation Linting Static Analysis Waveform Debugging Testbench Architecture
3+ yrs exp

Verification Platform Engineer, Platform Architecture

Apple Inc

Cupertino, CA 8 days ago $150,400$225,300
SystemVerilog UVM C++ Python Perl EDA Tools RTL Simulation Logic Equivalence Checking DPI-C High-Performance Computing Co-simulation Hardware Emulation Linting Static Analysis Waveform Debugging Testbench Architecture
3+ yrs exp

Verification Platform Engineer, Platform Architecture

Apple Inc

Cupertino, CA 8 days ago $184,700$324,800
SystemVerilog UVM C++ Python Perl EDA Tools RTL Simulation Logic Equivalence Checking DPI-C high-performance computing Co-simulation Hardware Emulation Linting Static Analysis Waveform Debugging Testbench Architecture
10+ yrs exp

Systems Engineer, Platform Architecture

Apple Inc

Cupertino, CA 31 days ago $150,400$225,300
C C++ Python Lua SystemVerilog VHDL FPGA PCI AXI Threading Concurrency Debugging Hardware Engineering
3+ yrs exp

Design Verification Engineer

Apple Inc

Austin, TX 6 days ago
SystemVerilog UVM Python TCL Perl LLM Gate Level Simulation UPF PCIe USB DDR Formal Verification Emulation Simulators Waveform Viewers RTL
10+ yrs exp