Verification Platform Engineer, Platform Architecture

Apple Inc

Confirmed live 2 days ago High trust

Quick summary

Work type
On-site
Location
Cupertino, CA
Salary
$184,700–$324,800 / yr
Posted
8 days ago
Freshness
Confirmed live 2 days ago

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $175k
This role $255k
$98k most similar roles pay here $349k

This role pays more than 96% of similar roles. Most pay $151,000–$198,183 — the shaded band above. At the midpoint, this role pays about $255k versus about $175k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

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At a glance

TL;DR · Verification Platform Engineer, Platform Architecture

The Verification Platform Engineer, Platform Architecture joins the Platform Architecture group to develop high-performance verification systems that accelerate the development of Apple silicon. This role bridges next-generation platform technology with design verification methodology and tooling by focusing on infrastructure improvements, testbench design, and platform research to improve simulation throughput for design verification workflows. The engineer will engage with silicon engineering groups to integrate RTL simulation tools, modify testbenches for efficiency, and utilize EDA tools such as Logic Equivalence Checking, wave dumps, and design libraries. Required skills include SystemVerilog, C++, and scripting in Perl or Python. Preferred expertise includes UVM, DPI-C, hardware acceleration, high-performance computing, and co-simulation architectures. The role addresses the technical challenge of pre-silicon validation by applying principles from hardware emulation to create advanced simulation solutions for complex silicon designs.

What you'll do

  • Evaluate, integrate, and maintain high-performance RTL simulation tooling with silicon engineering groups.
  • Modify testbench and design RTL to improve tool compatibility and simulation efficiency.
  • Use EDA tools like LEC and wave dumps to diagnose issues and explore design alternatives.
  • Design and integrate infrastructure improvements for faster simulation turnaround after RTL changes.
  • Develop agentic pipelines and other technologies to enable AI productivity for engineers.
  • Prototype solutions to improve simulation throughput for design verification workflows.

What we're looking for

  • Bachelor's degree in Computer Engineering, Electrical Engineering, or a related field (or equivalent practical experience).
  • Master's degree in Computer Engineering, Electrical Engineering, or another hardware-related field is preferred.
  • Experience with SystemVerilog and EDA tooling.
  • Experience with software development using C++ and scripting using Perl or Python.
  • 10+ years of relevant experience is preferred.
  • Deep hands-on experience in Design Verification methodologies including UVM, DPI-C, and testbench architecture.
  • Experience with LEC, linting/static analysis tools, waveform debugging, and simulation/emulation flows.
  • Experience with software optimization, high-performance computing (HPC), co-simulation architectures, or hardware acceleration.

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