Staff Memory Circuit Design Engineer

Broadcom

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: Mendota Heights-Northland
Salary: $109,700–$175,500 / yr
Employment: Full-time
Posted: 60 days ago
Freshness: Confirmed live yesterday
Closes: Feb 8, 2027
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $201k

This role $143k

$94k $256k

below market most similar roles pay here above market

This role pays less than 93% of similar roles. Most pay $172,375–$229,100 — the blue band above. At the midpoint, this role pays about $143k versus about $201k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 241 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 161 roles with salary data.

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At a glance

TL;DR · Staff Memory Circuit Design Engineer

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The Staff Memory Circuit Design Engineer joins the Central Engineering Group as part of an elite team developing memory compilers and custom macros on bleeding edge process technology. The role involves analyzing memory architectures, designing circuit blocks at the gate or transistor level, and performing floorplanning and leafcell layout integration. Key responsibilities include simulating designs, extracting layouts, developing automation scripts, and specifying behavioral and physical memory models. Candidates must demonstrate deep knowledge of transistor level circuit behavior, device physics, signal integrity, and reliability analysis. Required skills include experience with SRAMs, Register-files, Multi-ports, and ROMs, alongside proficiency in running simulators and Python programming. The position focuses on solving complex memory design problems, including characterization flow integration, DFT schemes, and silicon test plan correlation.

Skills

SRAM Register-files ROM Circuit Design Signal Integrity DFT Python Post-layout Simulation

What you'll do

Analyze different memory architectures and highlight the technical tradeoffs.
Design and build memory or circuit blocks at the gate or transistor level.
Simulate and analyze circuit designs using transistor level simulators.
Floorplan physical implementation and integrate leafcell layouts to build physical macros.
Develop scripts to automate characterization flows, simulations, and verification.
Specify and verify various behavioral and physical memory models.
Specify silicon test plans and correlate silicon data to simulation results.
Help debug silicon issues and perform reliability analysis.

What we're looking for

BS in Electrical Engineering.
8+ years of related experience.
Strong knowledge in development of memory compilers or custom digital circuits such as SRAMs, Register-files, Multi-ports, and ROM.
Deep understanding of transistor level circuit behavior and device physics.
Good understanding of signal integrity, EM/IR, and reliability analysis.
Understanding of memory behavioral and physical models.
Understanding of DFT schemes and chip level integration.
Proficient in running simulators, writing automation scripts, and tools savvy; Python proficiency is considered a positive (preferred).

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