SRAM Circuit Design Engineer

Apple Inc

Quick summary

Work type
On-site
Location
Austin, TX
Posted
62 days ago

Market check

Salary context

How this pay compares to similar roles

Similar $191k
$138k most similar roles pay here $234k

This listing doesn't post a salary. Most similar roles pay $165,200–$216,250.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1723 open roles on FindRole.

Listed pay typically runs $162,500–$272,100 across 1398 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · SRAM Circuit Design Engineer

Join Apple's Digital Custom Group as an SRAM Circuit Design Engineer, where you will collaborate closely with logic/architecture teams to design high-performance custom digital circuits for SRAM in cutting-edge products like the M1 chip. Your daily tasks include defining architecture specifications that optimize power, timing, area, and yield, conducting simulations and verifications, and working with layout teams to ensure optimal GDS creation. You will also write RTL code, validate use cases, and support post-silicon efforts for productization. Ideal candidates have experience in SoC design cycles, knowledge of cache architecture, and a solid understanding of industry-standard tools and nanometer device physics. Familiarity with machine learning algorithms is beneficial as you contribute to the development of innovative silicon solutions at scale.

What you'll do

  • Design and implement custom digital circuits for SRAM in high-performance products.
  • Define architecture optimizing power, timing, area, and yield for SRAM designs.
  • Capture schematics and perform simulations to ensure design integrity.
  • Collaborate with layout team to create optimal GDS for SRAM implementation.
  • Verify extracted GDS meets initial design specifications rigorously.
  • Conduct backend verification including IR/EM analysis for SRAM circuits.
  • Write RTL, validate use-cases, and verify against schematic designs meticulously.

What we're looking for

  • Design custom digital circuits for SRAM in high-performance SoCs.
  • Define architecture optimizing power, timing, area, and yield for SRAM/Register File.
  • Capture schematics, perform simulations, and verify margins for SRAM designs.
  • Collaborate with layout teams to create optimal GDS and ensure design specifications are met.
  • Write RTL code, validate use-cases, and support post-silicon efforts for productization.

More like this

Similar roles

SRAM Circuit Design Engineer

Apple Inc

San Diego, CA 56 days ago $171,600$302,200
RTL Verilog VHDL Cadence Synopsys Tanner EDA Calibre Python Machine Learning SoC SRAM Register File Cache Design Memory Hierarchy Low Power Design High Performance Design Silicon Debug Nanometer Device Physics Leakage Mechanisms

SRAM Circuit Design Engineer

Apple Inc

Austin, TX 56 days ago
RTL Verilog VHDL Cadence Synopsys Tanner EDA Calibre Python Machine_Learning SoC SRAM Register_File Cache_Design Memory_Hierarchy IR/EM_Analysis GDS_II DFT CI/CD

Senior SRAM Circuit Design Engineer

Nvidia

Santa Clara, CA 57 days ago $168,000$264,500
Perl Python Verilog VHDL SPICE Tcl Make RTL Simulation tools Waveform debugging tools ASIC design flow Custom circuit design SRAM design Transistor-level circuit design Power analysis Timing characterization Circuit verification Scripting languages Automation methods
Hybrid

Staff Engineer, SRAM Circuit Design

Samsung Semiconductor

San Jose, CA 8 days ago $163,000$253,000
HSPICE Python Perl TCL Spectre Cadence Virtuoso FinFET GAA SOI DRC LVS Design for Manufacturability Silicon Debug Voltage Scaling Power Gating Advanced Technology Nodes SRAM Compiler Development

CPU SRAM Design Engineer

Qualcomm

Austin, TX 10 days ago $122,500$183,700
SRAM Register_File Circuit_Simulation Monte_Carlo_Analysis Static_Timing_Analysis NanoTime Ansys_EMIR_analysis ESP-CV Liberate_power_analysis Verilog BIST DFT Custom_Memory_Layout Physical_Implementation_Impact Timing_Characterization

Staff Engineer, SRAM Layout

Samsung Semiconductor

San Jose, CA 8 days ago $163,000$253,000
Candence_Virtuoso Perl Tcl SKILL DRC LVS ERC RC_Extraction Parasitic_Analysis Signal_Integrity_Verification EDA_Tools Custom_IC_Design Physical_Verification_Pods Project_Management Cross_Functional_Collaboration