SoC RTL Performance Analysis Engineer

Arm Holdings

Confirmed live today High trust
Hybrid

Quick summary

Work type
Hybrid
Location
Austin, TX
Salary
$198,100–$268,000 / yr
Posted
20 days ago
Freshness
Confirmed live today

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $210k
This role $233k
$149k $281k
below market most similar roles pay here above market

This role pays more than 74% of similar roles. Most pay $177,300–$241,750 — the blue band above. At the midpoint, this role pays about $233k versus about $210k for comparable roles.

Based on 240 similar postings.

Employer

About Arm Holdings

Arm Holdings plc is a leading British semiconductor and software design firm, established in 1990 and recognized for developing energy-efficient processor architectures that power nearly all smartphones and a vast range of IoT and computing devices.

Arm Holdings currently has 113 open roles on FindRole.

Listed pay typically runs $208,450–$282,050 across 112 roles with salary data.

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At a glance

TL;DR · SoC RTL Performance Analysis Engineer

The SoC RTL Performance Analysis Engineer joins the System-on-Chip Performance Analysis Team within the Central Technology Group. This role focuses on building early performance analysis platforms to enable system technology exploration for future Arm System/SoC architecture. You will perform RTL performance analysis and verification, implement verification plans at the SoC-level, and drive emulation-based performance studies including emulator bring-up and complex system-level benchmarks. Key responsibilities include debugging performance failures, identifying design bottlenecks, and developing debug infrastructure or AI-based automation tools. Required technical skills include Verilog, SystemVerilog, C, C++, and scripting languages like Python or Ruby. You must possess a deep understanding of memory system architecture, interconnect design, multiprocessor coherency, and I/O ordering to solve complex performance problems across CPU, GPU, and I/O workloads.

What you'll do

  • Perform RTL performance analysis and verification for SoC.
  • Implement performance verification plans and debug using simulation and emulation environments.
  • Drive emulation-based studies including emulator bring-up and execution of system-level benchmarks.
  • Conduct theoretical analysis of memory system optimizations and analyze performance benchmarks.
  • Debug performance failures to identify design bottlenecks and propose architectural or RTL solutions.
  • Develop and enhance debug infrastructure, tooling, and visualization solutions for performance analysis.
  • Leverage AI-based tools and automation to improve engineering productivity and workflows.

What we're looking for

  • Proven experience in SoC RTL performance analysis and debug using hardware emulation platforms.
  • Hands-on experience with emulator bring-up, configuration, and development of new performance test cases.
  • Strong system-level performance debug experience across complex IP interactions, including CPU, GPU, and I/O workloads.
  • Deep understanding of memory system architecture and interconnect design.
  • Excellent knowledge of Verilog and SystemVerilog.
  • Working knowledge of C, C++, and a scripting language such as Python or Ruby.
  • Proven understanding of multiprocessor coherency, memory ordering, I/O ordering, interrupts, MMU, and cache architectures.
  • Strong debugging, data analysis, and technical presentation skills.

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