SoC Performance Analysis Engineer

Apple Inc

Confirmed live today Low trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$184,700–$324,800 / yr
Posted
157 days ago
Freshness
Confirmed live today

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $210k
This role $255k
$129k $346k
below market most similar roles pay here above market

This role pays more than 93% of similar roles. Most pay $177,300–$241,750 — the blue band above. At the midpoint, this role pays about $255k versus about $210k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3497 open roles on FindRole.

Listed pay typically runs $174,149–$277,600 across 2702 roles with salary data.

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At a glance

TL;DR · SoC Performance Analysis Engineer

The SoC Performance Analysis Engineer joins the SoC Performance Verification team within Hardware Technology to support the development of hardware for various devices. The primary responsibilities include working closely with Architecture to understand design performance goals, correlating RTL performance against model performance, and performing deep performance analysis to identify bottlenecks. The engineer will report findings, define performance statistics to assist in debugging, and establish standard methodologies to improve performance correlation efforts. This role requires sophisticated knowledge of CPU and SoC architecture and design. Necessary technical skills include familiarity with verification environments, Verilog, C/C++, and scripting in Perl or Python. The position involves leading independent work to align with project goals while supporting multi-functional engineering efforts to solve diverse hardware performance challenges.

What you'll do

  • Understand the performance goals of the design in close coordination with the Architecture team.
  • Correlate RTL performance against model performance.
  • Perform deep performance analysis in the design and report findings.
  • Identify performance bottlenecks and coordinate with Design and Architecture teams to improve performance.
  • Define performance statistics to assist in performance debugging.
  • Establish standard methodologies to improve performance correlation efforts.

What we're looking for

  • 10 years of industry experience.
  • Sophisticated knowledge of CPU and SoC architecture/design (preferred).
  • Familiarity with verification environments and Verilog, C/C++ (preferred).
  • Experience with SystemVerilog, Verilog, and scripting in Perl/Python (preferred).
  • Well-rounded in performance correlation and analysis with excellent social skills (preferred).
  • Desire to solve diverse challenges (preferred).
  • Bachelors degree.

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