SoC Power Flow Methodology Engineer

As an SoC Power Flow Methodology Engineer within the Low Power group, you will develop and improve low-power flow algorithms that impact mobile system-on-chip design. You will build innovative automated tools and capabilities for the Silicon Engineering Power team to create chips with high power efficiency. Your daily responsibilities include the architecture, implementation, and validation of advanced low-power design and verification workflows integrated into RTL development, synthesis, and place-and-route stages. You will actively leverage AI and machine learning tools to innovate solutions and enhance existing methodologies while collaborating with design teams to resolve issues. The role requires expertise in VLSI designs, SoC design processes, and scripting using Python, Perl, or TCL. You will apply these skills to solve complex power analysis, optimization, and verification challenges for emerging technologies within the semiconductor space.