SoC Physical Design Engineer, Power Delivery

Apple Inc

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Quick summary

Work type: On-site
Location: San Jose, CA
Salary: $150,400–$277,600 / yr
Posted: 104 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

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Competitive pay

How this pay compares to similar roles

Similar $203k

This role $214k

$135k $293k

below market most similar roles pay here above market

This role pays more than 61% of similar roles. Most pay $177,250–$229,100 — the blue band above. At the midpoint, this role pays about $214k versus about $203k for comparable roles.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3497 open roles on FindRole.

Listed pay typically runs $174,149–$277,600 across 2702 roles with salary data.

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TL;DR · SoC Physical Design Engineer, Power Delivery

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JOB TITLE: SoC Physical Design Engineer - Power Delivery The SoC Physical Design Engineer - Power Delivery joins a team responsible for completing partition place and route from netlist to tapeout, including automation tasks for Apple SOC. The role involves developing features and methodology solutions for a wide range of SOC partitions while resolving design and flow issues. Key responsibilities include collaborating with technology teams for node evaluations and working multi-functionally with CAD, Physical Verification, Electrical Analysis, and PnR teams to ensure a strong and DRC clean power grid. Candidates must utilize TCL and Python for writing maintainable and reusable scripts. Required technical skills include block level Physical Design Implementation from Netlist to GDS, Voltage Drop Analysis, STA, and Layout Verification. The work focuses on ensuring electrically robust power grids across various technology nodes.

Skills

Physical Design TCL Python Netlist to GDS PNR Voltage Drop Analysis STA Layout Verification CAD Electrical Analysis DRC Tapeout Automation

What you'll do

Complete partition place and route from netlist to tapeout for Apple SoCs.
Develop automation features and methodology solutions using TCL and Python.
Ensure a DRC-clean and electrically robust power grid through cross-functional coordination.
Resolve design and flow issues related to physical design and drive execution.
Perform node evaluations and physical verification in coordination with technology teams.
Conduct voltage drop analysis and layout verification using industry-standard tools.

What we're looking for

Minimum BS degree and 3+ years of relevant industry experience.
Experience with block level Physical Design Implementation from Netlist to GDS.
Scripting skills to write maintainable and reusable programs in TCL and/or Python.
Understanding of industry standard tools for PNR, Voltage Drop Analysis, STA, and Layout Verification.
Experience with automation for Physical Design and block execution (preferred).
Experience with cross-functional collaboration with CAD, Physical Verification, Electrical analysis, and PNR teams (preferred).
Experience with latest technology nodes tapeout (preferred).

SoC Physical Design Engineer, PnR

Apple Inc

San Jose, CA 40 days ago $129,300–$194,700

PnR Physical Design VLSI Verilog VHDL Python Perl TCL SPICE STA DRC LVS EMIR Redhawk Totem Voltus Floor-planning Physical Synthesis GDS2 Netlist

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