Signal and Power Integrity Engineer, SIO Interface

Apple Inc

Confirmed live 2 days ago Trusted

Quick summary

Work type
On-site
Location
San Francisco, CA
Salary
$129,300–$225,300 / yr
Posted
16 days ago
Freshness
Confirmed live 2 days ago

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Competitive pay

How this pay compares to similar roles

Similar $189k
This role $177k
$118k most similar roles pay here $237k

This role pays less than 52% of similar roles. Most pay $161,146–$216,562 — the shaded band above. At the midpoint, this role pays about $177k versus about $189k for comparable roles.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

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TL;DR · Signal and Power Integrity Engineer, SIO Interface

Signal and Power Integrity Engineer - SIO Interface works with the team developing SOCs used within Apple devices. This role is responsible for high-speed serial interface signal integrity and power integrity from silicon to package to board. The engineer will perform electrical and physical design of high-speed serial interface systems, including 3D model extractions and simulations for components like silicon analog front ends, package interposers, substrates, PCBs, connectors, and cables. Key responsibilities include defining interface specifications, optimizing circuit designs with vendors, and executing test plans to validate results. The role requires expertise in transmission line theory, 2D/3D EM simulation tools, and lab equipment such as VNA, TDR, real-time scopes, and spectrum analyzers. The work focuses on solving signal and power integrity challenges for high-speed serdes interfaces like USB and PCIe.

What you'll do

  • Manage all aspects of signal and power integrity for high-speed SerDes interfaces.
  • Define, influence, and implement technical specifications for serial interface systems.
  • Perform 3D model extractions and simulations for silicon, package, and PCB components.
  • Drive co-design across SoCs, packages, and systems to optimize product performance KPIs.
  • Execute test plans to validate signal and power integrity results.
  • Collaborate with circuit design teams and vendors to optimize SI/PI modeling and characterization.
  • Debug and improve product yield in coordination with product and system engineering teams.

What we're looking for

  • Bachelor's degree is the minimum requirement.
  • Prior design and modeling experience with USB, PCIe, or comparable interfaces is required.
  • PhD in a relevant field (preferred).
  • BS and 5+ years or MS and 3+ years of relevant industry experience (preferred).
  • Familiarity with signal and power integrity issues of high speed serial interfaces (preferred).
  • Experience with package/board design, SI/PI methodology development, and lab correlation of simulation results (preferred).
  • Familiarity with lab equipment such as VNA, TDR, real-time scope, and spectrum analyzers (preferred).
  • Strong fundamentals in 3D/2D EM simulation tools and transmission line theory (preferred).

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