below marketmost similar roles pay hereabove market
This listing doesn't post a salary. Most similar roles pay
$177,250–$216,250.
Based on 240 similar postings.
Employer
About Nvidia
Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing
Nvidia currently has
1623 open roles
on FindRole.
Listed pay typically runs
$184,000–$287,500
across 1110 roles with salary data.
The Senior VLSI Library Methodology Engineer will join the team to architect, specify, and implement scalable automation systems for GPU and SoC flows. The role involves building end-to-end infrastructure for library analysis, quality validation, documentation, and deployment within physical design flows. Key responsibilities include developing automated quality control flows, regression frameworks, and reporting dashboards while collaborating with design and CAD teams to improve cell design methodologies. Candidates must utilize Python, C++, or Perl to build data pipelines and integrate industry-standard EDA tools such as Innovus, Fusion Compiler, Crosscheck, and Virtuoso. The position focuses on solving technical challenges related to library modeling, issue triage, and data integrity. The work ensures production-quality systems maintain scalability, runtime efficiency, and operational robustness across advanced silicon design nodes.
Architect, specify, and implement scalable automation systems for GPU and SoC flow verification and release readiness.
Build end-to-end infrastructure including analysis pipelines, regression frameworks, dashboards, and reporting systems.
Develop automated library analysis, validation, and quality control flows using modern scripting and EDA tools.
Integrate quality systems and improve cell design methodologies in collaboration with design and CAD teams.
Define methodologies for issue triage, data integrity, quality metrics, and release criteria to improve flow visibility.
Optimize automation for runtime, capacity, and resource efficiency during large-scale analysis.
What we're looking for
M.S. in Electrical Engineering, Computer Engineering, Computer Science, or a related field (or equivalent experience).
4+ years of experience in library methodology, physical design, CAD, design automation, or related VLSI infrastructure development.
Strong software development skills in Python, C++, or Perl for building workflow automation, data pipelines, and validation frameworks.
Experience designing and implementing production-quality technical systems from an architectural and implementation point of view.
Hands-on experience with industry-standard EDA tools such as Innovus, Fusion Compiler, Crosscheck, Virtuoso, or similar.
Understanding of how library models are consumed in chip design flows, including synthesis, place and route, timing closure, and power analysis (preferred).
Experience building robust quality systems for library modeling, validation, or physical design automation (preferred).
Applied AI/ML/LLM experience to improve EDA workflows, automation systems, or design methodologies (preferred).
Python
C++
Perl
EDA Tools
Innovus
Fusion Compiler
Crosscheck
Virtuoso
VLSI
Physical Design
Library Modeling
Data Pipelines
AI
ML
LLM
Dashboards
Synthesis
Place and Route
Timing Closure
Power Analysis
Python
C++
Machine Learning
Agentic AI
Large Language Models
Combinatorial Optimization
EDA
VLSI
Circuit Design
CMOS Layout
DRC
LVS
Spice
Data Structures
Algorithms
Applied Math
Remote (Santa Clara, CA)+15 days ago
$136,000–$218,500
Python
C++
VLSI
EDA
AI
ML
LLMs
Signal Integrity
Power Delivery
Parasitic Extraction
IC Physical Design
Data Structures
Algorithms
Object-Oriented Design
Package Design
HPC
Remote (Santa Clara, CA)+125 days ago
$168,000–$264,500
VLSI
Python
C++
EDA
AI
ML
LLMs
Interposer Design
Signal Integrity
Power Delivery
Parasitic Extraction
IC Physical Design
Data Structures
Algorithms
Object-Oriented Design