Senior Software Engineer, RISC-V Instruction Set Simulator

Qualcomm

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Cupertino, CA
Salary
$167,100–$250,700 / yr
Posted
10 days ago
Freshness
Confirmed live yesterday
Closes
Feb 28, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $192k
This role $209k
$122k most similar roles pay here $264k

This role pays more than 72% of similar roles. Most pay $167,837–$216,250 — the shaded band above. At the midpoint, this role pays about $209k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

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At a glance

TL;DR · Senior Software Engineer, RISC-V Instruction Set Simulator

As a Senior Software Engineer — RISC-V Instruction Set Simulator, you will join the CPU Engineering team to develop a high-performance, production-grade instruction set simulator serving as a golden reference model for next-generation 64-bit RISC-V processors. You will translate RISC-V specification chapters into C++ code, covering extensions like integer, floating-point, vector, and security features. Your daily responsibilities include maintaining the fetch, decode, and execute engines, managing memory protection and privilege-level logic, and developing co-simulation harnesses to compare results against RTL. You will also write targeted unit tests and maintain developer tools. The role requires proficiency in C++, knowledge of processor architecture, and experience with systems programming or hardware verification. Preferred skills include familiarity with RISC-V, x86, or ARM architectures, Python 3+, GDB, ELF binaries, and Linux internals to ensure the simulator remains a trustworthy reference for firmware development.

What does a Software Engineer earn in California?

Median $214000 from 775 postings across 63 companies.

See salary data

What you'll do

  • Translate RISC-V specification chapters into functional C++ code for various processor extensions.
  • Maintain the simulator's fetch, decode, execute engine, and memory protection logic.
  • Develop co-simulation harnesses to compare the instruction set simulator against RTL designs.
  • Write targeted unit tests to verify individual features against official RISC-V specifications.
  • Develop and maintain a suite of simulator extensions and utilities for user productivity.
  • Ensure the simulator remains accurate enough to run long-running benchmarks and boot Linux.

What we're looking for

  • Bachelor's degree with 4+ years of experience in engineering or a related field.
  • Master's degree with 3+ years of experience in engineering or a related field.
  • PhD with 2+ years of experience in engineering or a related field.
  • Proficiency in C++ and ability to navigate unfamiliar codebases.
  • Knowledge of processor architecture, including pipelines, memory, privilege levels, and interrupts.
  • Experience in low-level or systems programming such as embedded systems, operating systems, compilers, or hardware description.
  • Familiarity with RISC-V, x86, or ARM architectures.
  • Experience with simulators like QEMU, Spike, gem5, GDB, ELF binaries, or Linux internals.

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