Senior PCIe Post-Silicon Validation Engineer

Nvidia

Confirmed live today High trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$136,000–$218,500 / yr
Employment
Full-time
Posted
1 day ago
Freshness
Confirmed live today

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $197k
This role $177k
$124k $247k
below market most similar roles pay here above market

This role pays less than 62% of similar roles. Most pay $177,250–$216,250 — the blue band above. At the midpoint, this role pays about $177k versus about $197k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1675 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1080 roles with salary data.

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At a glance

TL;DR · Senior PCIe Post-Silicon Validation Engineer

The Senior PCIe Post-Silicon Validation Engineer will join a dynamic team to validate features on the industry’s leading processor for deep learning, gaming, and dedicated computing. The successful candidate will be responsible for understanding design implementations, defining validation scopes, and developing post-silicon verification infrastructure, including testplans, tests, and data analysis scripts. Day-to-day tasks involve using hands-on lab equipment like logic analyzers and oscilloscopes to validate design correctness. Key technical requirements include expertise in Python and Perl, along with experience using simulation and debug tools such as VCS, Debussy, and GDB. Candidates should possess a background in bus protocols like PCI Express, SATA, or USB. This role requires working multi-functionally with ASIC, software, and system teams to solve complex hardware verification problems.

What you'll do

  • Validate hardware features on silicon using hands-on lab equipment like logic analyzers and oscilloscopes.
  • Define the validation scope and develop post-silicon verification infrastructure including testplans and scripts.
  • Implement test and coverage plans to ensure the correctness of the processor design.
  • Develop scripts to analyze data and automate validation processes using Python or Perl.
  • Debug hardware issues and drive them to closure in coordination with ASIC, SW, and System teams.
  • Analyze design implementations to identify potential issues during the post-silicon phase.

What we're looking for

  • BS or MS in EE, ECE, CS or equivalent experience.
  • 5+ years of meaningful validation experience.
  • Exposure to design and verification tools such as VCS or equivalent simulation and debug tools.
  • Experience with bus protocol or interconnect verification is preferred (preferred).
  • Background with lab equipment, oscilloscopes, and logic analyzers is helpful (preferred).
  • Expertise in Python and/or Perl.
  • Strong debugging, analytical, and interpersonal skills.
  • Proven record of working multi-functionally and driving issues to closure.

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