Senior Manager, Mixed-Signal and Systems Validation

Broadcom

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
San Jose, CAIrvine, CAFort Collins, CO
Salary
$167,500–$268,000 / yr
Posted
32 days ago
Freshness
Confirmed live yesterday
Closes
Feb 6, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $192k
This role $218k
$128k most similar roles pay here $283k

This role pays more than 81% of similar roles. Most pay $168,250–$216,250 — the shaded band above. At the midpoint, this role pays about $218k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 119 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 105 roles with salary data.

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At a glance

TL;DR · Senior Manager, Mixed-Signal and Systems Validation

As the Senior Manager, Mixed-Signal and Systems Validation, you will lead a technical engineering team focused on post-silicon validation, mixed-signal IP verification, and system-level testing for next-generation Hard Disk Drive Read Channels and advanced AI ASICs. You will manage engineers to develop test strategies for high-speed ADCs, PLLs, feedback loops, and continuous-time filters while overseeing silicon bring-up, characterization, and debugging of hardware flaws. The role involves collaborating with architecture and firmware teams to ensure performance standards are met. You will utilize Palladium and Zebu emulators for pre-silicon validation and employ test systems for post-silicon analysis. Required skills include expertise in system-level testing, board-level debugging using oscilloscopes and logic analyzers, and proficiency in Python or MATLAB for automated test infrastructure. This role addresses critical challenges in signal processing and high-performance AI accelerator integration.

What you'll do

  • Manage and mentor a team of validation and system integration engineers to ensure high performance and growth.
  • Oversee project scheduling, resource planning, and budget management to meet development milestones.
  • Define and execute pre-silicon and post-silicon validation plans for HDD Read Channels and AI ASICs.
  • Lead the bring-up, characterization, and debugging of new silicon in a laboratory environment.
  • Develop scalable, automated test infrastructure and methodologies to improve coverage and execution efficiency.
  • Resolve complex technical issues by partnering with ASIC Design, Architecture, Firmware, and Product Engineering teams.
  • Analyze complex silicon characterization data to identify and root-cause hardware and architectural flaws.

What we're looking for

  • Master’s (MS) or Ph.D. in Electrical Engineering, Computer Engineering, or a closely related technical field.
  • 15+ years of experience in read channel/HDD design/validation, post-silicon validation, mixed-signal IC characterization, or system engineering.
  • 5+ years managing a technical team of engineers.
  • Deep understanding of HDD architectures, signal processing, and Read Channel technologies and systems validation.
  • Strong technical understanding of ADCs, PLLs, Continuous-Time Filters, and closed-loop feedback systems.
  • Understanding of AI/ML ASICs and accelerators.
  • Expertise in System-Level Testing (SLT), board-level debugging, and lab equipment such as oscilloscopes and logic analyzers.
  • Proficiency in test automation languages like Python or MATLAB and strong data analysis skills for silicon characterization.

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