Senior Implementation Methodology Engineer

Nvidia

Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $168,000–$264,500 / yr
Posted: 5 days ago
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $182k

This role $216k

$132k most similar roles pay here $279k

This role pays more than 75% of similar roles. Most pay $146,500–$216,618 — the shaded band above. At the midpoint, this role pays about $216k versus about $182k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 980 open roles on FindRole.

Listed pay typically runs $168,000–$270,250 across 966 roles with salary data.

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At a glance

TL;DR · Senior Implementation Methodology Engineer

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Join NVIDIA’s VLSI team as a senior Implementation Methodology Engineer, where you will lead the development and continuous improvement of the RTL2GDS pipeline for advanced-node CPU builds. Your responsibilities include evaluating new EDA tools, defining methodology best practices, conducting rigorous experiments to optimize quality-of-results, and driving aggressive power-performance-area targets. You will build Python/TCL/Perl automation frameworks to enhance engineering throughput and eliminate systemic bottlenecks through data-driven regression infrastructure and AI/ML-assisted flow optimization. This role requires deep expertise in the RTL2GDS flow, proficiency with Synopsys and Cadence tools, scripting skills, and a proven track record of driving complex technical initiatives across diverse teams.

Skills

Python TCL Perl Synopsys_DC Synopsys_ICC2 Cadence_Genus Cadence_Innovus AI/ML EDA_tools RTL2GDS_flow PPA_optimization CI/CD Git Make

What you'll do

Own and enhance the RTL2GDS implementation methodology for advanced-node CPU builds.
Evaluate new EDA tools and provide clear adoption recommendations to internal teams.
Define and enforce implementation methodology best practices across development teams.
Conduct rigorous experiments to compare flows, settings, and optimization strategies quantitatively.
Drive aggressive PPA targets and resolve timing closure bottlenecks at scale.
Architect automation frameworks using Python/TCL/Perl to reduce manual engineering effort.

What we're looking for

6+ years of hands-on experience in ASIC implementation methodology and EDA tool development.
Expertise in the complete RTL2GDS flow including synthesis, floorplanning, placement, CTS, routing, and MCMM STA.
Proficiency with Synopsys (DC/FC, ICC2, PrimeTime) or Cadence (Genus, Innovus, Tempus) tools as a power user.
Experience in EDA tool evaluation, flow benchmarking, and methodology development with proven PPA impact.
Strong scripting skills in Python, TCL, Perl for flow automation and analysis.
Ability to drive complex technical initiatives across cross-functional teams.

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