Senior Formal Verification Engineer

Nvidia

Confirmed live today Low trust
Hybrid

Quick summary

Work type
Hybrid
Location
CATXCOORWAMA
Salary
$136,000–$218,500 / yr
Employment
Full-time
Posted
113 days ago
Freshness
Confirmed live today

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $198k
This role $177k
$124k $247k
below market most similar roles pay here above market

This role pays less than 61% of similar roles. Most pay $177,250–$218,075 — the blue band above. At the midpoint, this role pays about $177k versus about $198k for comparable roles.

Based on 240 similar postings.

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About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

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At a glance

TL;DR · Senior Formal Verification Engineer

As a Senior Formal Verification Engineer - LPU, you will join the team to verify sophisticated AI-related ASIC builds and features using advanced formal verification methods. Your daily responsibilities include collaborating with architecture and RTL teams to specify properties, resolve complex building issues, and influence micro-architecture decisions. You will develop advanced formal verification environments and methodologies, building automated flows for scalability and efficiency while supporting silicon bring-up and debug. The role requires proficiency in SystemVerilog Assertions (SVA), formal property verification, and industry tools like JasperGold or VC Formal. You must apply formal verification to ensure critical build properties align with specifications and minimize ambiguities. This position focuses on the technical challenges of GPU or LPU architecture builds, requiring deep expertise in datapath verification and formal sign-off.

What you'll do

  • Verify AI-related ASIC builds and features using advanced formal verification methods.
  • Specify properties and resolve complex building issues with architecture and RTL teams.
  • Influence micro-architecture decisions based on formal verification results.
  • Ensure critical build properties align with specifications to minimize ambiguities.
  • Articulate formal verification coverage metrics to internal partners.
  • Develop advanced formal verification environments and automated flows for complex ASIC designs.
  • Support silicon bring-up and debug processes using formal methods.

What we're looking for

  • BS/MS/PhD or equivalent experience in CS/CE/EE.
  • 5+ years in ASIC verification.
  • 3+ years of experience with formal verification methods.
  • Proficiency in SystemVerilog Assertions (SVA) and formal property verification.
  • Experience with at least one popular formal verification tool like JasperGold or VC Formal.
  • Excellent skills in applying AI tools in daily engineering work to solve problems.
  • Strong written and oral communication skills with keen attention to detail.
  • Demonstrated success in full-cycle formal sign-off for complex builds (preferred).

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