Senior Engineer, RTL Design

Samsung Semiconductor

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$138,000–$206,000 / yr
Posted
today

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Competitive pay

How this pay compares to similar roles

Similar $170k
This role $172k
$129k most similar roles pay here $214k

This role pays more than 57% of similar roles. Most pay $139,100–$200,000 — the shaded band above. At the midpoint, this role pays about $172k versus about $170k for comparable roles.

Based on 240 similar postings.

Employer

About Samsung Semiconductor

Samsung Semiconductor is the global semiconductor business unit of Samsung Electronics, designing and manufacturing memory chips, logic semiconductors, and foundry solutions for a broad range of applications.

Samsung Semiconductor currently has 54 open roles on FindRole.

Listed pay typically runs $163,000–$253,000 across 54 roles with salary data.

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At a glance

TL;DR · Senior Engineer, RTL Design

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As a Senior Engineer in RTL Design at Samsung’s Memory Solutions Lab (MSL) in San Jose, CA, you will join the Datacenter Device Solutions Group to develop innovative data center and cloud technologies. Your role involves microarchitecture design, developing high-performance RTL IPs for proof-of-concepts, lab bring-up and validation of IPs, researching next-generation memory and storage controller features, and contributing to FPGA prototype feasibility studies. You’ll work closely with hardware and software architects on Linux/Windows device driver development and debugging while participating in value proposition studies and filing patents. Ideal candidates have a strong background in HDL development, Verilog coding, and experience with Synopsys, Mentor, and Cadence tools, along with familiarity in PCIe, CXL, NVMe, AXI, DDR4/5, and Ethernet protocols.

Skills

Verilog Synopsys Cadence MentorGraphics PCIe CXL NVMe AXI DDR4 DDR5 Ethernet FPGA Linux Windows Python Simulation TestBench CI/CD

What you'll do

  • Develop new RTL IP for high-performance proof-of-concepts.
  • Conduct lab bring-up, test, and validation of RTL IPs.
  • Research next-generation memory and storage controller features.
  • Work on FPGA prototypes to contribute to feasibility studies.
  • Assist in developing Linux/Windows device drivers and debugging.
  • Participate in value proposition studies and file patents.

What we're looking for

  • BS with 5 years or MS with 3 years of RTL development experience.
  • In-depth background in HDL development, Verilog coding, and CAD tool usage.
  • Experience with hardware board bring-up, server system integration, and software integration.
  • Familiarity with FPGA design flows, synthesis, timing analysis, and testing.
  • Knowledge of PCIe, CXL, NVMe, AXI, DDR4/5, Ethernet protocols.
  • Ability to work in a team environment, meeting aggressive project deadlines.
  • Excellent verbal and written communication skills for cross-functional collaboration.

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