below marketmost similar roles pay hereabove market
This role pays more than
99%
of similar roles. Most pay
$147,025–$219,125
— the blue band above.
At the midpoint, this role pays about
$402k
versus about
$183k
for comparable roles.
Based on 240 similar postings.
Employer
About Nvidia
Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing
Nvidia currently has
1472 open roles
on FindRole.
Listed pay typically runs
$184,000–$287,500
across 1109 roles with salary data.
The Senior Director, ATE Test Development leads a global organization responsible for production test architecture, hardware, and program development for complex silicon products. This leader defines the vision and roadmap for ATE creation from new product introduction through high-volume manufacturing. Key responsibilities include driving production test readiness, establishing scalable methodologies for test automation, and managing silicon correlation, quality screening, and yield enablement. The role requires expertise in ATE platforms, test hardware design, test program development, instrumentation, and statistical analysis. The position solves critical business problems regarding test cost optimization, defect screening, and quality containment for SoC, ASIC, or GPU-class products. Success requires managing distributed teams of managers and engineers while partnering across design, DFT, reliability, and manufacturing ecosystems to ensure design-to-test alignment.
Define the vision, roadmap, and operating model for ATE creation from new product introduction through high-volume manufacturing.
Lead a global organization responsible for test hardware, program development, characterization, and silicon correlation.
Drive production test readiness including test coverage, guardband strategy, yield learning, and defect screening.
Establish scalable methodologies, standards, release criteria, and quality gates for ATE development and deployment.
Manage ATE platform selection, vendor engagement, capacity readiness, and capital planning to support product ramps.
Use data and analytics to improve silicon correlation, binning strategies, and excursion response.
Build a high-performance leadership culture through hiring, interpersonal development, and succession planning.
What we're looking for
BS, MS, or PhD in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience.
18+ years of relevant semiconductor experience.
8+ years of management experience leading managers and distributed engineering organizations.
Deep expertise in ATE development for high-volume silicon, SoC, ASIC, or GPU-class products.
Proven success leading organizations through NPI, silicon bring-up, characterization, production ramp, yield improvement, and quality execution.
Strong understanding of ATE platforms, test hardware design, test program development, instrumentation, silicon correlation, statistical analysis, and production test methodologies.
Experience owning roadmaps, budgets, staffing plans, and operational priorities for large-scale engineering organizations.
Experience with GPU, AI, networking, or other high-performance compute products (preferred).
Test Automation
Reliability Testing
Data Acquisition
Root-Cause Analysis
DVT
Design Verification Testing
Regression Testing
Certification Testing
Digital Twins
Systems Engineering
Instrumentation
Test Infrastructure
Product Qualification
Control Systems
Data Pipelines