Principal Design Verification Engineer | Microsoft Careers
Microsoft
At a glance
AI generatedThe Senior Design Verification Engineer will join Microsoft’s AI Silicon Engineering (AISiE) SoC Design Verification team, collaborating with cross-discipline teams to develop verification environments and test cases for cutting-edge AI accelerators. Daily responsibilities include creating complex verification plans, developing comprehensive test suites, and implementing technical solutions to address design challenges. The role requires expertise in Verilog or VHDL, C/C++, Python, Ruby, or Perl, along with deep knowledge of System Verilog, UVM, and coverage closure. Ideal candidates have 6+ years of experience in silicon IP verification, chip architecture, hardware emulation, and firmware development, making significant contributions to the design and validation of advanced AI accelerators at Microsoft’s scale.
Skills
What you'll do
What we're looking for
Market check
This $119,800–$234,700 range sits above 69% of similar postings on FindRole.
Peer median band
$125,825–$218,500
Median floor and ceiling across peers.
Typical midpoint (25–75%)
$149,962–$203,200
Middle half of comparable postings.
Based on 240 comparable postings.
* 240 is the maximum number of comparable postings sampled.
Employer
Microsoft Corporation is a global technology leader producing software, hardware, and cloud services including Windows, Office 365, Azure cloud platform, Xbox gaming, and Surface devices. Industry: Software & Cloud Computing
Microsoft currently has 451 open roles on FindRole.
Listed pay typically runs $119,800–$234,700 across 417 roles with salary data.
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