Senior Custom ASIC Engineering Lead

Broadcom

Quick summary

Work type
On-site
Location
San Jose, CAFort Collins, COIrvine, CA
Salary
$143,800–$230,000 / yr
Posted
9 days ago
Closes
Dec 16, 2026
Nearby
99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $196k
This role $187k
$133k most similar roles pay here $240k

This role pays less than 52% of similar roles. Most pay $175,000–$216,250 — the shaded band above. At the midpoint, this role pays about $187k versus about $196k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 95 open roles on FindRole.

Listed pay typically runs $120,000–$192,000 across 93 roles with salary data.

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View all roles at Broadcom

At a glance

TL;DR · Senior Custom ASIC Engineering Lead

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As a senior engineer in Broadcom’s ASIC Products Division, you will lead external and internal cross-functional teams through the entire lifecycle of complex chip designs for AI, HPC, networking, and storage. Your responsibilities include managing customer programs from RFQ to production, advising on EDA best practices, identifying and mitigating design risks, executing physical design flows, and collaborating with marketing, sales, legal, and regulatory teams. You must have extensive experience in multiple tape-outs at advanced technology nodes, expertise in low power design, physical design, STA, and EDA tools, as well as proficiency in TCL, shell scripting. Knowledge of DFT methods and SERDES protocols is beneficial. This role offers the opportunity to drive cutting-edge technological advancements while working on large-scale infrastructure chips that impact various semiconductor segments.

Skills

TCL Shell Scripting EDA tools Physical design STA DFT Verilog RTL coding Logic simulation Test Packaging Low power design Power management SERDES DRC Logic synthesis Memory BIST Microarchitecture Chip architecture

What you'll do

  • Manage external customer ASIC programs from inception to finish.
  • Advise customers on EDA best practices and organize Q&A sessions with experts.
  • Proactively assess and mitigate risks to design quality and project schedule.
  • Execute physical design flows to ensure tape-out netlists meet quality standards.
  • Stay updated on Broadcom IPs, technology, and end-user applications developments.

What we're looking for

  • Extensive experience in multiple tape-outs at advanced technology nodes.
  • Proficiency in physical design, STA, EDA tools, and scripting languages like TCL and shell.
  • Expertise in analyzing PPA tradeoffs among library components and architectures.
  • Strong knowledge of low power design and power management techniques.
  • Ability to lead cross-functional teams and manage customer ASIC programs from start to finish.
  • Experience advising on best practices for EDA flows and design methodologies.

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