RFIC System Engineer

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
San Francisco, CA
Salary
$184,700–$324,800 / yr
Posted
2 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $178k
This role $255k
$116k $347k
below market most similar roles pay here above market

This role pays more than 97% of similar roles. Most pay $142,500–$214,000 — the blue band above. At the midpoint, this role pays about $255k versus about $178k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3523 open roles on FindRole.

Listed pay typically runs $174,149–$277,600 across 2731 roles with salary data.

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At a glance

TL;DR · RFIC System Engineer

JOB TITLE: RFIC System Engineer The RFIC System Engineer joins the wireless silicon development team to architect, design, and deliver state-of-the-art CMOS radios from RF-to-bits. This role involves researching and bringing next-generation wireless technologies into high-volume production using advanced CMOS technology nodes. Key responsibilities include translating chip-level specifications into detailed block-level requirements, developing models to analyze the impact of analog impairments on transceiver performance, and overseeing test and characterization through productization. The engineer must collaborate with technology teams to understand node limits while ensuring block performance meets system requirements via bottom-up modeling. Required skills include RF/analog and mixed-signal design experience, proficiency in MATLAB, Python, and SystemVue, and a deep understanding of CMOS device physics, RF transceiver architectures, and standards like Bluetooth, WiFi, and Ultra-Wideband.

What you'll do

  • Translate chip and transceiver-level specifications into detailed block-level specifications.
  • Develop models to analyze the impact of analog impairments on transceiver performance.
  • Perform bottom-up modeling to ensure block performance meets system requirements.
  • Oversee the test and characterization of designs from early development through productization.
  • Debug technical issues arising during the design and production stages.
  • Analyze technology node capabilities and limits to achieve optimum performance.
  • Research and design next-generation wireless technologies for high-volume production.

What we're looking for

  • BS degree and a minimum of 10 years of relevant industry experience.
  • Experience in RF/analog and mixed-signal design within RF CMOS design.
  • Experience with MATLAB, Python, SystemVue, or other system-level modeling tools.
  • Experience modeling RF/Analog circuits using MATLAB/Verilog-A/Python and writing block-level specifications (preferred).
  • Direct tape-out experience with RF front-end circuits, PAs, LNAs, mixers, oscillators, PLLs, VGAs, filters, or ADC/DACs in deep sub-micron CMOS (preferred).
  • Deep understanding of RF transceiver architectures, analog design concepts, and CMOS device physics (preferred).
  • Familiarity with Bluetooth, WiFi, and Ultra-Wideband standards (preferred).
  • Experience in Si characterization and debug (preferred).

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