Process Engineer - Die to Wafer Hybrid Bonding

Applied Materials

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Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$124,000–$171,000 / yr
Employment
Full-time
Posted
48 days ago
Freshness
Confirmed live today

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $198k
This role $148k
$111k most similar roles pay here $247k

This role pays less than 83% of similar roles. Most pay $162,750–$233,812 — the shaded band above. At the midpoint, this role pays about $148k versus about $198k for comparable roles.

Based on 240 similar postings.

Employer

About Applied Materials

Applied Materials is the world''s largest supplier of equipment, services, and software for the semiconductor and display industries, enabling the production of chips and advanced displays. Industry: Semiconductor Equipment

Applied Materials currently has 260 open roles on FindRole.

Listed pay typically runs $124,000–$171,000 across 192 roles with salary data.

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At a glance

TL;DR · Process Engineer - Die to Wafer Hybrid Bonding

Process Engineer – Die to Wafer Hybrid Bonding Joining the Photonics Platforms Business Group, you will work with a cross-functional research team to develop 2.5D/3D advanced packaging technologies. This role focuses on die-to-wafer hybrid bonding R&D, including surface preparation, plasma activation, high-accuracy die placement, and post-bond characterization. You will design and execute DOE-driven experiments to understand process limits while performing failure analysis and process optimization. The work involves integrating bonding with modules like dicing, die thinning, and planarization. Key technical requirements include experience in wafer-to-wafer bonding, thin-die handling, and heterogeneous integration of materials like III-V to Si. You will utilize tools for statistical analysis and process control such as JMP. Candidates must possess expertise in bond interface physics, alignment fundamentals, and the mechanical behavior of fragile dies to solve complex challenges in advanced packaging integration.

What you'll do

  • Develop die-to-wafer hybrid bonding processes including surface preparation and plasma activation.
  • Execute high-accuracy die placement and alignment during the bonding process.
  • Perform post-bond characterization and evaluate overall process performance.
  • Integrate D2W bonding with adjacent modules like dicing, thinning, and planarization.
  • Design and execute DOE-driven experiments to identify process limits and sensitivities.
  • Conduct failure analysis and perform characterization to drive continuous engineering improvements.
  • Optimize manufacturing processes for 2.5D/3D advanced packaging technologies.

What we're looking for

  • Ph.D. or M.S. in Materials Science, Electrical Engineering, Applied Physics, or a related STEM discipline.
  • In-depth knowledge and hands-on experience in die-to-wafer or wafer-to-wafer bonding.
  • Experience with thin-die handling and alignment-critical processes.
  • Experience in Micro-LED, CPO, or heterogeneous integration such as III-V to Si (preferred).
  • Experience with 2.5D/3D integration (preferred).
  • Direct process engineer experience on mainstream semiconductor equipment like plasma, wet clean, or overlay/alignment.
  • Strong understanding of bond interface physics, alignment and overlay fundamentals, and mechanical behavior of thin dies.
  • Proficiency in statistical analysis and process control using DOE, SPC, or JMP.

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