Principal SoC RAS Architect

Arm Holdings

Confirmed live today High trust
Hybrid

Quick summary

Work type
Hybrid
Location
San Jose, CA
Salary
$262,700–$355,400 / yr
Posted
130 days ago
Freshness
Confirmed live today

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $219k
This role $309k
$145k $378k
below market most similar roles pay here above market

This role pays more than 94% of similar roles. Most pay $182,676–$254,750 — the blue band above. At the midpoint, this role pays about $309k versus about $219k for comparable roles.

Based on 240 similar postings.

Employer

About Arm Holdings

Arm Holdings plc is a leading British semiconductor and software design firm, established in 1990 and recognized for developing energy-efficient processor architectures that power nearly all smartphones and a vast range of IoT and computing devices.

Arm Holdings currently has 113 open roles on FindRole.

Listed pay typically runs $208,450–$282,050 across 112 roles with salary data.

Most-posted roles

View all roles at Arm Holdings

At a glance

TL;DR · Principal SoC RAS Architect

The Principal SoC RAS Architect joins the Solution Engineering SoC architecture team to drive the reliability, availability, and serviceability strategy for next-generation SoCs. This role involves defining architectural specifications, setting goals, and developing roadmaps for SoCs targeting data center applications. The architect will build scalable solutions that balance power, performance, and area while leading implementation of reliability-aware design techniques such as ECC, parity, error logging, detection, and mitigation strategies. Key responsibilities include collaborating with design, verification, manufacturing, and product engineering teams throughout the product lifecycle. Required expertise includes a Master’s degree in a related engineering field, over ten years of SoC development experience, and deep knowledge of fault detection, error handling, and resiliency techniques for large-scale compute platforms, including familiarity with PCIe, CXL, or JEDEC memory standards.

What you'll do

  • Define reliability, availability, and serviceability (RAS) requirements for next-generation SoCs.
  • Architect scalable RAS solutions that balance power, performance, and area (PPA) requirements.
  • Develop and guide the implementation of ECC, parity, error logging, and mitigation strategies.
  • Lead RAS efforts throughout the product lifecycle across design, implementation, and verification teams.
  • Ensure SoC compliance with data center-class reliability and availability standards.
  • Develop RAS strategies and roadmaps for SoCs targeting data center applications.

What we're looking for

  • Master’s degree or higher in Computer Engineering, Computer Science, Electrical Engineering, or a related discipline.
  • 10+ years of experience in SoC development with a focus on RAS architecture.
  • Deep understanding of data center-class availability and reliability expectations.
  • Expertise in fault detection, error handling, and resiliency techniques for large-scale compute platforms.
  • Experience designing and deploying RAS strategies for Arm-based architectures (preferred).
  • Familiarity with reliability modeling, stress and aging analysis, and silicon health monitoring (preferred).
  • Understanding of firmware and software roles in RAS implementations (preferred).
  • Exposure to industry standards such as RAS for PCIe, CXL, or JEDEC memory (preferred).

More like this

Similar roles

Principal SoC RAS Architect

Arm Holdings

Austin, TX 130 days ago $262,700–$355,400
SoC Architecture RAS ECC Parity Fault Detection Error Handling Silicon Debug Reliability Modeling Stress and Aging Analysis PCIe CXL JEDEC Firmware Verification Physical Implementation
10+ yrs exp Hybrid

Senior SoC Architect, RAS

Nvidia

Santa Clara, CA +2 55 days ago $184,000–$287,500
SoC Architecture RAS SystemC C/C++ Python RTL Silicon Validation Fault Injection ECC Design for Debug Design for Test Design for Reliability Functional Safety Error Injection Post-Silicon Validation Telemetry Memory Controllers Interconnects Emulation
8+ yrs exp

SoC Architect

Arm Holdings

Austin, TX +1 117 days ago $308,600–$417,500
SoC Architecture Heterogeneous Compute Power Management Clocking Coherent Interconnect PCIe CXL Multi-level Caching Functional Profiling Debug Security Virtualization Memory Hierarchies 2.5D/3D Packaging DRAM Soft Real-time Accelerators
10+ yrs exp Hybrid

Lead SoC Architect

Amd

San Jose, CA +1 3 days ago $268,320–$402,480
SoC Architecture x86 ARM RISC-V PCIe CXL Ethernet DDR UCIe UAL RTL Design Verification Physical Design Firmware Hardware Security Performance Simulation Chiplet RAS

SoC Architect

Arm Holdings

San Diego, CA +2 117 days ago $308,600–$417,500
SoC Architecture Heterogeneous Compute Power Management Clocking Coherent Interconnect PCIe CXL Multi-level Caching Functional Profiling Debug Security Virtualization Memory Hierarchies 2.5D/3D Packaging
10+ yrs exp Hybrid

SoC Architect

Amd

San Jose, CA 83 days ago $200,000–$300,000
SoC Architecture analog/mixed-signal SerDes PCIe CXL DDR LPDDR HBM UCIe Ethernet USB Signal Integrity Power Integrity Clocking Architecture Power Management Package-Board Co-design High-Performance Computing AI Engines