Principal Engineer, Hardware Emulation

Samsung Semiconductor

Confirmed live today High trust

Quick summary

Work type: On-site
Location: San Jose, CA
Salary: $219,000–$351,000 / yr
Posted: 8 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $196k

This role $285k

$131k $375k

below market most similar roles pay here above market

This role pays more than 98% of similar roles. Most pay $168,792–$222,500 — the blue band above. At the midpoint, this role pays about $285k versus about $196k for comparable roles.

Based on 240 similar postings.

Employer

About Samsung Semiconductor

Samsung Semiconductor is the global semiconductor business unit of Samsung Electronics, designing and manufacturing memory chips, logic semiconductors, and foundry solutions for a broad range of applications.

Samsung Semiconductor currently has 36 open roles on FindRole.

Listed pay typically runs $163,000–$253,000 across 36 roles with salary data.

Most-posted roles

View all roles at Samsung Semiconductor

At a glance

TL;DR · Principal Engineer, Hardware Emulation

Role Posting Log in to save

The Principal Engineer, Hardware Emulation joins the team to improve capabilities and debug issues for top-tier emulation vendors. This role involves bringing up the emulation platform for mixed-signal SoCs, developing monitors and checkers, and maintaining the emulation environment. The engineer will debug performance and area issues while developing workflows to support productivity during debug and runtime analysis of emulation results. Key responsibilities include owning chip-level emulation models for validating networking chip subsystems and enhancing methodology for robustness and test throughput. Required technical skills include proficiency with Palladium or Zebu platforms, Verilog, SystemVerilog RTL design, and SVAs. Candidates must be skilled in Perl or Python scripting, Makefile build flows, and waveform debug tools like Verdi or SimVision to validate chips pre-silicon and reproduce real silicon failures.

What does a Engineer earn in California?

Median $199500 from 103 postings across 31 companies.

See salary data

Skills

Palladium Zebu Python Perl SystemVerilog Verilog Verdi SimVision Makefile Mixed-Signal SoC Emulation Waveform Debug RTL Design

What you'll do

Bring up the emulation platform for mixed-signal SoCs.
Develop monitors and checkers for the emulation platform.
Debug emulation performance and area issues.
Develop and maintain the emulation environment and infrastructure.
Enhance emulation methodology for robustness, test throughput, and debuggability.
Validate the chip pre-silicon by working with simulation, firmware, and software test teams.
Reproduce failures seen in real silicon on the emulator.
Maintain chip-level emulation models for validating networking chip subsystems.

What we're looking for

BS in Computer/Electrical/Electronic Engineering or Computer Science with 20 years of relevant experience.
MS in Computer/Electrical/Electronic Engineering or Computer Science with 18 years of relevant experience (preferred).
Technical knowledge and proficiency working with at least one industry-standard HW emulator platform such as Palladium or Zebu.
Experience with emulation compile flow, wave dump and triggers, waveform debug, and running tests.
Experience writing scripts in Perl or Python.
Experience with waveform debug tools such as Verdi/SimVision.
Good understanding of Verilog and SystemVerilog RTL design.
Exposure to synthesizable SystemVerilog/Verilog code and SVAs.

Similar roles

Senior Emulation Performance Methodology & Debug Engineer

Qualcomm

San Diego, CA 11 days ago $121,800–$182,600

Verilog SystemVerilog Python TCL C FPGA Veloce Palladium JTAG ASIC Design Emulation Synthesis Place and Route Timing Closure SoC Architecture Kernel Debuggers Bus Protocols DDR NoC

4+ yrs exp

Save

Emulation Engineer

Apple Inc

Cupertino, CA 40 days ago $150,400–$277,600

SystemVerilog Verilog C++ C UVM VHDL Python Perl TCL Makefile Palladium Veloce Zebu PCIe USB Power Estimation DPI Transactors

3+ yrs exp

Save

CPU Emulation Engineer

Qualcomm

Santa Clara, CA 40 days ago $175,600–$263,400

SystemVerilog C++ C Python Perl Verilog RISCV Palladium Zebu Veloce FPGA Linux DPI Firmware

4+ yrs exp

Save

ASIC Emulation Engineer

Amd

Santa Clara, CA 46 days ago $166,400–$249,600

ZeBu Veloce Palladium ASIC RTL C/C++ Python Tcl Shell Hardware-Software Co-Verification Ethernet PCIe RDMA RoCE DMA Firmware Packet Processing Traffic Management QoS

Save

Emulation Engineer

Broadcom

San Jose, CA 35 days ago

Verilog SystemVerilog Python C/C++ Tcl Emulation Zebu Palladium Pre-silicon Verification ASIC Ethernet PCIe IXIA Spirent Coverage-driven Verification DPI Scripting

Save

Senior ASIC Emulation Engineer, HW&SW

Amazon Inc

Austin, TX +1 59 days ago $213,000–$287,500

ASIC Emulation Cadence Palladium Mentor Veloce SystemVerilog Verilog VHDL C++ Python Tcl Perl Bare Metal ARM AMBA AXI4 UVM CI/CD Hardware Description Languages Embedded Firmware

10+ yrs exp

Save