Principal Engineer, Architecture & Performance Research for Data Center and Agentic AI CPU

Samsung Semiconductor

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$219,000–$351,000 / yr
Posted
3 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $223k
This role $285k
$155k most similar roles pay here $372k

This role pays more than 82% of similar roles. Most pay $186,025–$259,650 — the shaded band above. At the midpoint, this role pays about $285k versus about $223k for comparable roles.

Based on 240 similar postings.

Employer

About Samsung Semiconductor

Samsung Semiconductor is the global semiconductor business unit of Samsung Electronics, designing and manufacturing memory chips, logic semiconductors, and foundry solutions for a broad range of applications.

Samsung Semiconductor currently has 33 open roles on FindRole.

Listed pay typically runs $163,000–$253,000 across 33 roles with salary data.

Most-posted roles

View all roles at Samsung Semiconductor

At a glance

TL;DR · Principal Engineer, Architecture & Performance Research for Data Center and Agentic AI CPU

Principal Engineer, Architecture & Performance Research for Data Center and Agentic AI CPU joins the Architecture Research Lab to develop next-generation RISC-V microarchitecture and performance for emerging computing workloads. This role involves defining architectural visions for agentic AI and memory-centric architectures while translating workload characterization into long-term design requirements. You will perform end-to-end performance analysis using architectural simulators and RTL, manage the transition from research to silicon validation, and mentor senior engineers. Key technical requirements include expertise in front-end, mid-end, or back-end microarchitectural domains, proficiency in C/C++ and Python for tool development, and experience with gem5. The role addresses the challenge of evolving CPU architecture to meet performance and efficiency demands in data center environments through AI-driven methodologies, focusing on core innovation, portfolio expansion, and technical contributions leading to patents or publications.

What you'll do

  • Define the architectural vision and performance direction for next-generation RISC-V CPU platforms.
  • Conduct end-to-end performance analysis using architectural simulators and RTL to guide design trade-offs.
  • Translate workload characterization and performance insights into specific architectural requirements and long-term designs.
  • Ensure architectural intent is successfully implemented by coordinating with RTL design teams through silicon validation.
  • Develop and apply AI-driven methodologies to accelerate architectural exploration and design iteration.
  • Mentor senior and staff engineers while providing technical leadership across multiple architectural domains.
  • Contribute to the field through research activities leading to patents and technical publications.

What we're looking for

  • Master’s degree in Computer Engineering, Computer Science, or a related field with 18+ years of experience, or a PhD with 15+ years of experience.
  • At least 5 years of experience in CPU microarchitecture, architecture research, or performance engineering.
  • Extensive experience designing and evaluating high-performance CPU architectures including RISC-V, ARM, or x86 cores.
  • Proven ability to use quantitative performance analysis and modeling to identify architectural opportunities and evaluate system-level trade-offs.
  • Deep expertise in at least one major microarchitectural domain such as front-end, mid-end, or back-end systems.
  • Hands-on experience building and applying architectural simulators and performance models like gem5.
  • Strong programming skills in C/C++ and Python for developing tools and automation for performance analysis.
  • Experience with AI-driven architecture methodologies, memory-centric architectures, or GPU/NPU accelerator architectures (preferred).

More like this

Similar roles

CPU Performance Architect, Platform Architecture

Apple Inc

Santa Clara, CA 102 days ago $216,200–$324,800
SoC Architecture Performance Modeling Power Modeling RTL C++ C Python Perl SIMD Memory Subsystem Prefetching Data Structures Algorithms
10+ yrs exp

VP Engineering, Data Center CPU Software

Qualcomm

Santa Clara, CA +1 17 days ago $303,200–$454,800
Firmware System Architecture OS Hypervisor BMC Telemetry Orchestration Compilers Runtimes Networking Storage Cloud-native Infrastructure Verification and Validation Silicon Bring-up
10+ yrs exp

Principal AI Performance Engineer

Arm Holdings

San Jose, CA 18 days ago $262,700–$355,400
Arm Triton CUDA Python C++ DNN Parallel Computing Memory Hierarchies Performance Optimization AI Frameworks
Hybrid

Principal AI Performance Engineer

Arm Holdings

San Jose, CA 10 days ago $262,700–$355,400
Arm Triton CUDA Python C++ DNN Parallel Computing Memory Hierarchies Performance Optimization AI Frameworks
Hybrid

Principal Platform Architect, AGI CPU

Arm Holdings

Austin, TX 53 days ago $249,900–$338,100
SoC Design Hardware Design System Modeling Simulation Emulation Rack-scale Architecture Accelerator Interconnect Power Efficiency Cooling Solutions Board Design Bring-up Validation Packaging Techniques
10+ yrs exp