below marketmost similar roles pay hereabove market
This role pays more than
87%
of similar roles. Most pay
$169,550–$246,200
— the blue band above.
At the midpoint, this role pays about
$271k
versus about
$208k
for comparable roles.
Based on 240 similar postings.
Employer
About Qualcomm
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has
575 open roles
on FindRole.
Listed pay typically runs
$147,900–$221,900
across 550 roles with salary data.
The Principal CPU PPA Pathfinding Engineer joins the CPU Engineering group to define competitive power, performance, and area options for future CPU products. This role involves analyzing architectural concepts, process technology choices, and physical design constraints to create credible PPA projections and actionable recommendations. You will build representative implementation experiments, generate power-performance curves across various workloads, and develop constrained-performance projections under thermal and voltage limits. Key responsibilities include performing competitive analysis, mentoring engineers, and collaborating with architecture, RTL, and physical design teams. Required skills include deep expertise in physical synthesis, floorplanning, place and route, static timing analysis, and power analysis. You must be proficient in scripting using Python, Tcl, or Perl to automate PPA analysis flows and maintain a fact-based view of technology trajectories.
Lead CPU PPA pathfinding studies from early concept exploration through implementation feasibility assessment.
Define and compare PPA options across microarchitecture, frequency, process technology, and floorplans.
Build implementation experiments and design-of-experiment frameworks to quantify trade-offs and optimization opportunities.
Generate area and power estimates, frequency projections, and power-performance curves across various workloads and thermal conditions.
Develop constrained-performance projections based on peak-power, thermal, voltage, and cost limits.
Perform competitive CPU PPA analysis to identify market gaps and translate insights into forward-looking design requirements.
Propose viable CPU PPA options to leadership including quantified benefits, risks, and implementation complexity.
Mentor engineers and contribute to scalable PPA analysis flows, automation, and best practices.
What we're looking for
15+ years of relevant industry experience in CPU or high-performance ASIC/SoC implementation.
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 8+ years of relevant work experience.
Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 7+ years of relevant work experience.
PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of relevant work experience.
Strong hands-on implementation background in physical synthesis, floorplanning, place and route, clock tree synthesis, static timing analysis, power analysis, and signoff.
Demonstrated experience evaluating and optimizing power, performance, and area for high-frequency CPU cores or similarly complex designs.
Proficiency in scripting and automation using Python, Tcl, Perl, or similar languages.
Experience with CPU microarchitecture, advanced process nodes, and industry-standard implementation tools from Cadence and/or Synopsys (preferred).
C
C++
Python
Java
ARM
RISC-V
Firmware
RTOS
J-TAG
ICE
SoC
SPI
I2C
PCIe
CAN
Ethernet
USB
UFS
Kernel
Virtualization
Memory Management
Computer Architecture
CPU Microarchitecture
Performance Modeling
Front End CPU Uarch
Midcore CPU Uarch
Memory Subsystem CPU Uarch
Electrical Engineering
Computer Engineering
Physical Design
PPA
Place and Route
Timing Analysis
EM
Noise Analysis
Back-end Verification
Floor planning
Clock Distribution
Power Distribution
Scripting
Design for Yield
Manufacturability
Thermal Management
CPU Architecture
Micro-architecture
C
C++
Python
Perl
SIMD
Vector Architectures
RTL
Data Structures
Algorithms
Software Design Patterns
OS Internals
Compiler Technologies
Branch Prediction
Prefetchers