Power Integrity Engineer

What you'll do

• Define the power delivery network (PDN) architecture and design solutions for various power specifications.
• Model, simulate, and characterize power delivery across die, interposer, package, board, and voltage regulators.
• Conduct end-to-end simulation studies to meet stringent impedance and voltage droop requirements.
• Manage all SoC droop topics including inrush, noise coupling analysis, and active droop mitigation.
• Provide implementation guidelines and feedback to silicon, package, and system design teams.
• Perform feasibility studies for silicon floorplans, advanced droop mitigation schemes, and system mockup designs.
• Execute model-to-hardware correlation on both component and product levels.
• Verify power integrity quality through physical lab measurements and equipment analysis.

What we're looking for

• Bachelor's degree and 10+ years of relevant industry experience.
• Master's or PhD with academic background in Power/Signal Integrity, Power Electronics, or Analog Circuit Design (preferred).
• Experience in PI/SI methodology development, PDN modeling from system to die, and lab correlation/validation (preferred).
• Proficiency in Python coding and AI/ML assisted automation experience (preferred).
• Knowledge of 3D/2D EM simulation tools, electromagnetic theory, and transmission line theory (preferred).
• Familiarity with lab equipment including VNA, real-time scope, and spectrum analyzer (preferred).
• Understanding of power supply architecture, PCB design trends, and chip supply design methodologies (preferred).
• Experience in design and analysis of product power supply solutions (preferred).