PMIC Engineering Program Manager

Apple Inc

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Quick summary

Work type
On-site
Location
Sunnyvale, CA
Salary
$144,600–$263,800 / yr
Posted
89 days ago
Freshness
Confirmed live today

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $193k
This role $204k
$130k $278k
below market most similar roles pay here above market

This role pays more than 63% of similar roles. Most pay $168,137–$217,975 — the blue band above. At the midpoint, this role pays about $204k versus about $193k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3497 open roles on FindRole.

Listed pay typically runs $174,149–$277,600 across 2702 roles with salary data.

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At a glance

TL;DR · PMIC Engineering Program Manager

The PMIC Engineering Program Manager joins the program management team to drive the development of custom Power Management ICs and analog IP integrated into Apple SoCs using advanced process nodes. In this individual contributor role, you will own the full silicon lifecycle from architecture through mass production. You will coordinate cross-functional teams across silicon design, systems architecture, product engineering, and operations to resolve complex technical challenges and meet aggressive schedules. Key responsibilities include leading technical discussions on power management architectures, evaluating design tradeoffs for efficiency and performance, and managing bug tracking and risk communication. You must possess deep knowledge of ASIC and VLSI design flows, with specific experience in power management, battery management, and designing analog blocks like LDOs, bandgap references, ADCs, and buck/boost converters.

What you'll do

  • Own the full silicon lifecycle for custom Power Management ICs and analog IP.
  • Drive technical issue resolution to deliver silicon against aggressive product schedules.
  • Lead technical discussions on power management architectures and design tradeoffs like efficiency and area.
  • Coordinate cross-functional teams to integrate PMU analog IP into SoC schedules.
  • Unblock technical issues by pulling together cross-functional expertise for data-driven decision-making.
  • Lead technical sessions with suppliers and design partners to track critical issues.
  • Manage focused issue reporting, bug tracking, and communication of program risks.

What we're looking for

  • BS Degree in a technical discipline.
  • 3+ years of relevant experience.
  • Proven experience in SOC/VLSI Chip Design, ASIC Chip Design, Power Management Chip design, or Technology process development.
  • Prior experience in Technical Program or Project Management, or Systems/Customer Support (preferred).
  • Experience working in a dynamic engineering environment with strong real-time crisis management skills (preferred).
  • Proven ability to own and drive project execution using well-defined metrics (preferred).
  • Deep knowledge of ASIC and VLSI design flows, with experience leading silicon projects from concept to production (preferred).
  • Prior engineering experience with power management, PMICs, or battery management products (preferred).

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