Physical Synthesis CAD Engineer

Apple Inc

Confirmed live yesterday High trust

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Work type
On-site
Location
Austin, TX
Posted
14 days ago
Freshness
Confirmed live yesterday

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How this pay compares to similar roles

Similar $210k
$137k most similar roles pay here $277k

This listing doesn't post a salary. Most similar roles pay $177,250–$242,212.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 2925 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2305 roles with salary data.

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At a glance

TL;DR · Physical Synthesis CAD Engineer

As a Physical Synthesis CAD Engineer, you will join the hardware team to address critical synthesis challenges for high-performance processor architectures including CPUs, GPUs, and NPUs. You will be responsible for developing, improving, and supporting the implementation flow from RTL through GDS signoff while creating innovative scripts, automated flows, and custom tools to improve physical synthesis techniques. Your daily work involves partnering with design teams to define methodologies that achieve superior performance, power, and area results. You will also collaborate with EDA vendors to shape tool roadmaps and solve complex problems beyond industry standards. Required skills include proficiency in TCL, Python, or Perl scripting languages. Preferred experience includes using tools like Fusion Compiler or Genus, managing CAD flows, performing static timing analysis, and utilizing low-power implementation flows such as UPF.

What you'll do

  • Develop and validate breakthrough physical synthesis techniques through full implementation flows including PNR, STA, and power analysis.
  • Apply advanced RTL optimization techniques to improve performance, power, and area (PPA) for high-performance processors.
  • Create custom tools and machine learning-based methodologies to solve complex low-power design problems.
  • Develop automated scripts and optimized flows to push beyond conventional synthesis limits.
  • Partner with design teams to define specific methodologies and flow optimizations for their unique challenges.
  • Collaborate with EDA vendors to shape tool roadmaps and build custom solutions for non-standard problems.
  • Deploy technical solutions across multiple critical Apple Silicon projects to improve device efficiency.

What we're looking for

  • Bachelor of Science degree is the minimum requirement.
  • Experience with TCL, Python, or Perl scripting languages.
  • Experience with industry standard Synthesis tools such as Fusion Compiler or Genus (preferred).
  • Experience working with CAD Tools and flow (preferred).
  • Experience in CAD flow or FE methodology development (preferred).
  • Experience with Low Power implementation flows (UPF) is a plus (preferred).
  • Experience with logical equivalence tools such as Conformal LEC and/or Formality is a plus (preferred).
  • Experience in linting, static timing analysis, low power checks (UPF), or place and route tools is a plus (preferred).

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