PCIe, CXL and Highspeed IO Validation Engineer

What you'll do

• Develop and execute feature enablement and validation test plans for High-Speed IO across all AMD Server products.
• Create test content for focus testing, system-level stress testing, and cross-product stress testing of the IO domain.
• Build post-silicon validation infrastructure including software, hardware, automation environments, and lab setups.
• Test interactions between various SoC features using established validation infrastructure.
• Perform root-cause analysis and debug SoC-related issues at both the SoC and system levels.
• Develop tools and methodologies to improve SoC validation, debugging processes, and test strategies.
• Participate in silicon bring-up and provide technical debug support to internal engineering teams.

What we're looking for

• Bachelor's degree in BSEE/CSE/CS with 7+ years of experience.
• Master's degree in MSEE/CSE/CS with 5+ years of experience.
• Proven hands-on experience in SoC design or validation of high-speed IO interfaces (preferred).
• Experience with PCIe Gen5/6+, CXL, UCIe, or proprietary inter-die and multi-socket server interfaces (preferred).
• Understanding of modern x86 microprocessor architecture and Server platform architecture (preferred).
• Familiarity with programming/scripting languages such as C/C++, Python, or Perl (preferred).
• Working knowledge of Server OSes like Linux or Windows (preferred).
• Extensive experience with lab equipment, including protocol/logic analyzers and oscilloscopes (preferred).