Platform Validation Lead, IO Interfaces

What you'll do

• Develop and execute feature enablement and validation test plans for SoC and system-level features across Server and AI products.
• Integrate AI/ML technologies to improve post-silicon validation, debug efficiency, and automated failure triage.
• Create test content for focus testing, system-level stress testing, and cross-product IO domain testing.
• Perform functional validation, regression, and debugging for Networking, IFoE, IB, UAL, Scale up, and Scale out domains.
• Build post-silicon validation infrastructure including software, hardware, automation environments, and lab setups.
• Provide root cause analysis for platform issues involving SoC logic, performance, and BIOS/firmware in datacenter environments.

What we're looking for

• A Bachelor's degree in BSEE/CSE/CS with 8+ years of experience or a Master's degree in EEE/CSE/CS with 6+ years of experience.
• Expertise in high-speed IO such as PCI Express, CXL, or RAS to drive system validation and debug for AI GPU systems.
• Experience developing test plans, execution, and strong debug skills at the SoC and platform levels.
• Proficiency in programming or scripting languages such as C/C++, Python, or Perl (preferred).
• Extensive experience with board/platform-level debug including delivery, sequencing, analysis, and optimization (preferred).
• Ability to use Oscilloscopes, protocol analyzers, and JTAG based Debug Tools for capturing data (preferred).
• Knowledge of pre-silicon environments such as Verification, Emulation, or Virtual Bring-Up (preferred).
• Proficiency with Linux or Microsoft Operating Systems (preferred).