Senior Packaging Engineer

Qualcomm

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$127,200–$190,800 / yr
Posted
3 days ago
Closes
Dec 22, 2026

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $161k
This role $159k
$119k most similar roles pay here $202k

This role pays less than 58% of similar roles. Most pay $139,750–$183,037 — the shaded band above. At the midpoint, this role pays about $159k versus about $161k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 834 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 514 roles with salary data.

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View all roles at Qualcomm

At a glance

TL;DR · Senior Packaging Engineer

As a Staff Packaging Engineer at Qualcomm Technologies, you will lead the development and high-volume manufacturing of advanced integrated circuit packaging technologies for Data Center, AI, Power Management, Compute, and emerging markets. Your day-to-day responsibilities include exploring new FCCSP, FCBGA, and SiP/Module packaging technologies, defining package process flows, collaborating with OSATs and material suppliers, and ensuring Design for Manufacturability (DFM) methodologies are implemented. You will manage complex technical programs, provide regular updates to management, and solve intricate manufacturing challenges. The role requires expertise in Flip Chip CSP, FCBGA, SiP packaging materials, assembly processes, and equipment optimization. Strong knowledge of Failure Mode and Effects Analysis (FMEA), Statistical Process Control/Quality Control (SPC/QC) concepts, and reliability test methods is essential. Ideal candidates have at least 8 years of experience in IC package development and a background in electrical, mechanical, or materials engineering.

What you'll do

  • Develop and deploy advanced IC packaging technologies for high-volume manufacturing.
  • Define package process flows, material sets, and Best Known Methods (BKM) to ensure product reliability.
  • Interface with OSATs, substrate suppliers, and tool makers to align technology development with product requirements.
  • Collaborate with internal design teams to promote Design for Manufacturability (DFM) methodology.
  • Manage technical programs, including planning, execution, and monitoring of complex processes or product developments.
  • Demonstrate expertise in Failure Mode and Effects Analysis (FMEA), SPC/QC concepts, and quality issue resolution.

What we're looking for

  • At least 8+ years of experience in developing and manufacturing advanced IC packages.
  • Expertise in Flip Chip CSP, FCBGA, SiP packaging materials, assembly processes, equipment, and design rules.
  • Strong project management skills for technical programs and ability to lead multi-functional teams.
  • Demonstrated capability in solving complex technical problems independently.
  • Understanding of Failure Mode and Effects Analysis (FMEA) and Statistical Process Control/Quality Control (SPC/QC).
  • Experience with Wafer-on-Wafer bonding is preferred but not required.
  • Bachelor’s degree or higher in a relevant engineering field, such as Electrical Engineering.

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