Low Power ASIC Engineer - New College Grad 2026

Nvidia

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$100,000–$166,750 / yr
Posted
49 days ago

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $184k
This role $133k
$86k most similar roles pay here $235k

This role pays less than 94% of similar roles. Most pay $158,962–$209,750 — the shaded band above. At the midpoint, this role pays about $133k versus about $184k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 985 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 971 roles with salary data.

Most-posted roles

View all roles at Nvidia

At a glance

TL;DR · Low Power ASIC Engineer - New College Grad 2026

Join NVIDIA’s Low Power Design/Verification (DV) team as an ASIC Engineer for new college graduates in 2026, where you will work closely with architecture, design, and software teams to develop cutting-edge testbenches, infrastructure, and test plans for verifying power management solutions across AI, automotive, GeForce, and mobile products. Your role involves enhancing power-aware DV methodologies and influencing EDA vendors to improve simulation efficiency. Ideal candidates have a BS, MS, or PhD in Electrical or Computer Engineering with expertise in low-power design techniques like multi-VT, clock gating, and dynamic voltage-frequency scaling (DVFS). Proficiency in Verilog, SystemVerilog, UVM, Incisive Low-Power, Synopsys VCS NLP, and Verdi is essential, along with scripting skills in Python or Perl. Experience with UPF format for power intent and background in low-power architectures or verification is a plus.

What you'll do

  • Develop testbench infrastructure to verify power management solutions for NVIDIA products.
  • Architect test plans to ensure comprehensive verification of low-power features in GPUs.
  • Collaborate with architecture and design teams to understand next-generation power requirements.
  • Enhance power-aware DV methodologies by bringing creative ideas and improvements.
  • Influence EDA vendors to enhance simulation and debug efficiencies for low-power designs.

What we're looking for

  • Recent BS, MS, or PhD in Electrical/Computer Engineering or equivalent experience.
  • Proficient in low power design techniques including multi VT, clock gating, and DVFS.
  • Experience with Incisive Low-Power or Synopsys VCS NLP for verification.
  • Strong debug skills using Verdi and fluency in Verilog/SystemVerilog/UVM.
  • Understanding of processor architecture (GPU preferred) and related power management.
  • Scripting abilities in Python/Perl, knowledge of C/C++ is a plus.

More like this

Similar roles

ASIC Hardware Design Engineer - New College Grad 2026

Nvidia

Austin, TX 60 days ago $116,000$189,750
Python Verilog RTL design SOC architecture CI/CD Docker Git Unix/Linux VCS Perl Makefiles SVN C/C++ Java JavaScript HTML CSS SQL PostgreSQL Mentor Graphics Calibre Cadence Virtuoso

ASIC Verification Engineer - New College Grad 2026

Nvidia

Durham, NC +2 58 days ago $100,000$166,750
SystemVerilog C++ UVM Python Perl VCS IES Debussy GDB Object-Oriented Programming Constrained Random Testing Functional Coverage Assertion-Based Verification Semiformal Verification Memory Management Unit Cache Topologies Interconnects Arbiter Designs