ASIC Clocks Verification Engineer - New College Grad 2026

Nvidia

Hybrid

Quick summary

Work type: Hybrid
Location: Santa Clara, CA
Salary: $116,000–$189,750 / yr
Posted: 37 days ago

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $184k

This role $153k

$104k most similar roles pay here $231k

This role pays less than 76% of similar roles. Most pay $155,275–$212,718 — the shaded band above. At the midpoint, this role pays about $153k versus about $184k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 563 open roles on FindRole.

Listed pay typically runs $168,000–$264,500 across 556 roles with salary data.

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At a glance

TL;DR · ASIC Clocks Verification Engineer - New College Grad 2026

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The GPU clocks group seeks an ASIC Clocks Verification Engineer to join their dynamic team responsible for designing high-frequency clock structures in GPUs. This role involves collaborating with architects, designers, and verification engineers to ensure the clocking requirements are met while working closely with floor-planning, back-end, software, and silicon solution teams to address design challenges and debug issues. The engineer will use Perl scripts to enhance productivity across various teams and contribute to delivering efficient clock programming sequences. Essential skills include a Master’s degree in Electrical Engineering or equivalent experience, proficiency in SystemVerilog and UVM, and strong coding abilities in Python, Perl, or similar languages. This position requires expertise in design verification, logic design, and synthesis to tackle sub-micron design challenges and improve GPU clocking efficiency.

Skills

SystemVerilog UVM Python Perl Design_Verification Logic_Design Logic_Synthesis CI/CD

What you'll do

Develop high-frequency clock structures for GPUs in collaboration with architects and designers.
Engage multiple teams to design GPU clocks that meet architectural constraints.
Apply verification principles to ensure the accuracy of clock designs.
Deliver clock information to SOC, timing, and DFT teams using Perl scripts.
Collaborate with software teams to debug silicon bugs related to GPU clocking.
Design clock structures to address sub-micron design challenges.
Identify and implement improvements for enhanced efficiency in GPU clocking.

What we're looking for

Master’s degree in Electrical Engineering or equivalent experience.
Practical experience with SystemVerilog and Universal Verification Method (UVM).
Experience in design verification, logic design, and synthesis.
Strong coding skills in Python, Perl, or other industry-standard scripting languages.
Ability to collaborate across multiple engineering teams.

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