ASIC Clocks Verification Engineer

Nvidia

Confirmed live yesterday Trusted

Hybrid

Quick summary

Work type: Hybrid
Location: Santa Clara, CA
Salary: $116,000–$189,750 / yr
Posted: 134 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $183k

This role $153k

$104k most similar roles pay here $231k

This role pays less than 69% of similar roles. Most pay $152,875–$212,500 — the shaded band above. At the midpoint, this role pays about $153k versus about $183k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 896 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.

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View all roles at Nvidia

At a glance

TL;DR · ASIC Clocks Verification Engineer

Role Posting Log in to save

As an ASIC Clocks Verification Engineer - New College Grad 2026, you will join the GPU clocks group to verify high frequency clock structures and design GPU clocking systems that satisfy specific architectural constraints. You will collaborate with front design, floor-planning, back-end, software, and silicon solution teams to manage requirements, develop programming sequences, and triage silicon or programming bugs in the lab. Your daily work involves delivering clock information to SOC verification, timing, and DFT teams while identifying improvements for current designs to overcome sub-micron challenges. To succeed, you must possess a Master’s degree in Electrical Engineering and practical experience with SystemVerilog, UVM, Design Verification, Logic Design, and Logic Synthesis. You will also utilize Python and Perl scripting to improve team productivity and ensure efficient GPU clocking design across new products.

Skills

SystemVerilog UVM Python Perl ASIC Design Logic Synthesis Design Verification Clocking Structures DFT Scripting Languages

What you'll do

Verify high-frequency clock structures using SystemVerilog and Universal Verification Methodology (UVM).
Design GPU clock structures that satisfy all architectural constraints.
Develop and implement new methods to improve the efficiency of GPU clocking designs.
Create and maintain scripts in Perl or Python to improve team productivity.
Triage and debug GPU clock silicon and programming bugs in the lab.
Deliver technical clock information to SOC verification, timing, and DFT teams.
Design clocking structures specifically engineered to overcome sub-micron design challenges.

What we're looking for

A Master's degree in Electrical Engineering or equivalent experience is required.
Practical experience with SystemVerilog and Universal Verification Method (UVM) is required.
Experience in Design Verification, Logic Design, and Logic Synthesis is required.
Strong coding skills in Python, Perl, or other industry-standard scripting languages are required.
Ability to verify high frequency clock structures while satisfying architectural constraints.
Ability to collaborate with cross-functional teams including architects, ASIC designers, and software groups.
Ability to identify and implement improvements for GPU clocking design efficiency.

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